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https://github.com/brain-hackers/u-boot-brain
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568336ecc7
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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ddr.c | ||
law.c | ||
Makefile | ||
mpc8548cds.c | ||
tlb.c |