mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-31 14:28:52 +09:00
66 lines
1.8 KiB
C
66 lines
1.8 KiB
C
/*
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* Copyright 2008 Extreme Engineering Solutions, Inc.
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*
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* This driver support NAND devices which have address lines
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* connected as ALE and CLE inputs.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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/*
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* Hardware specific access to control-lines
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*/
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static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
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{
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struct nand_chip *this = mtd->priv;
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ulong IO_ADDR_W;
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if (ctrl & NAND_CTRL_CHANGE) {
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IO_ADDR_W = (ulong)this->IO_ADDR_W;
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IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE |
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CONFIG_SYS_NAND_ACTL_ALE |
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CONFIG_SYS_NAND_ACTL_NCE);
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if (ctrl & NAND_CLE)
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IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE;
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if (ctrl & NAND_ALE)
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IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE;
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if (ctrl & NAND_NCE)
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IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE;
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this->IO_ADDR_W = (void *)IO_ADDR_W;
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, this->IO_ADDR_W);
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}
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int board_nand_init(struct nand_chip *nand)
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{
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nand->ecc.mode = NAND_ECC_SOFT;
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nand->cmd_ctrl = nand_addr_hwcontrol;
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nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY;
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return 0;
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}
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