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![]() This adds a clock driver to support the GEMGXL management IP block found in FU540 SoCs to control GEM TX clock operation mode for 10/100/1000 Mbps. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
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.. | ||
analogbits-wrpll-cln28hpc.h | ||
fu540-prci.c | ||
gemgxl-mgmt.c | ||
Kconfig | ||
Makefile | ||
wrpll-cln28hpc.c |