mirror of
https://github.com/brain-hackers/u-boot-brain
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59 lines
1.7 KiB
C
59 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Switch to non-secure mode
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*
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* Copyright (c) 2018 Heinrich Schuchardt
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*
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* This module contains the ARMv8 specific code required to adjust the exception
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* level before booting an operating system.
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*/
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#include <common.h>
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#include <bootm.h>
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#include <cpu_func.h>
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#include <log.h>
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#include <asm/cache.h>
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#include <asm/setjmp.h>
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/**
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* entry_non_secure() - entry point when switching to non-secure mode
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*
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* When switching to non-secure mode switch_to_non_secure_mode() calls this
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* function passing a jump buffer. We use this jump buffer to restore the
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* original stack and register state.
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*
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* @non_secure_jmp: jump buffer for restoring stack and registers
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*/
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static void entry_non_secure(struct jmp_buf_data *non_secure_jmp)
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{
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dcache_enable();
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debug("Reached non-secure mode\n");
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/* Restore stack and registers saved in switch_to_non_secure_mode() */
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longjmp(non_secure_jmp, 1);
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}
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/**
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* switch_to_non_secure_mode() - switch to non-secure mode
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*
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* Exception level EL3 is meant to be used by the secure monitor only (ARM
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* trusted firmware being one embodiment). The operating system shall be
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* started at exception level EL2. So here we check the exception level
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* and switch it if necessary.
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*/
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void switch_to_non_secure_mode(void)
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{
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struct jmp_buf_data non_secure_jmp;
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/* On AArch64 we need to make sure we call our payload in < EL3 */
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if (current_el() == 3) {
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if (setjmp(&non_secure_jmp))
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return;
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dcache_disable(); /* flush cache before switch to EL2 */
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/* Move into EL2 and keep running there */
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armv8_switch_to_el2((uintptr_t)&non_secure_jmp, 0, 0, 0,
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(uintptr_t)entry_non_secure, ES_TO_AARCH64);
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}
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}
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