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https://github.com/brain-hackers/u-boot-brain
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e456a81935
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
12 lines
359 B
Plaintext
12 lines
359 B
Plaintext
QEMU RISC-V 'VIRT' BOARD
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M: Bin Meng <bmeng.cn@gmail.com>
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S: Maintained
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F: board/emulation/qemu-riscv/
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F: include/configs/qemu-riscv.h
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F: configs/qemu-riscv32_defconfig
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F: configs/qemu-riscv32_smode_defconfig
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F: configs/qemu-riscv32_spl_defconfig
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F: configs/qemu-riscv64_defconfig
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F: configs/qemu-riscv64_smode_defconfig
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F: configs/qemu-riscv64_spl_defconfig
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