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https://github.com/brain-hackers/u-boot-brain
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![Wolfgang Denk](/assets/img/avatar_default.png)
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
210 lines
4.1 KiB
C
210 lines
4.1 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002, 2010
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* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <netdev.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/arch/s3c24x0_cpu.h>
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#include "vcma9.h"
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#include "../common/common_util.h"
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Miscellaneous platform dependent initialisations
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*/
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int board_early_init_f(void)
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{
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struct s3c24x0_gpio * const gpio = s3c24x0_get_base_gpio();
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/* set up the I/O ports */
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writel(0x007FFFFF, &gpio->gpacon);
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writel(0x002AAAAA, &gpio->gpbcon);
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writel(0x000002BF, &gpio->gpbup);
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writel(0xAAAAAAAA, &gpio->gpccon);
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writel(0x0000FFFF, &gpio->gpcup);
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writel(0xAAAAAAAA, &gpio->gpdcon);
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writel(0x0000FFFF, &gpio->gpdup);
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writel(0xAAAAAAAA, &gpio->gpecon);
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writel(0x000037F7, &gpio->gpeup);
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writel(0x00000000, &gpio->gpfcon);
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writel(0x00000000, &gpio->gpfup);
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writel(0xFFEAFF5A, &gpio->gpgcon);
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writel(0x0000F0DC, &gpio->gpgup);
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writel(0x0028AAAA, &gpio->gphcon);
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writel(0x00000656, &gpio->gphup);
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/* setup correct IRQ modes for NIC (rising edge mode) */
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writel((readl(&gpio->extint2) & ~(7<<8)) | (4<<8), &gpio->extint2);
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/* select USB port 2 to be host or device (setup as host for now) */
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writel(readl(&gpio->misccr) | 0x08, &gpio->misccr);
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return 0;
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}
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = 0x30000100;
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icache_enable();
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dcache_enable();
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return 0;
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}
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/*
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* Get some Board/PLD Info
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*/
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static u8 get_pld_reg(enum vcma9_pld_regs reg)
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{
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return readb(VCMA9_PLD_BASE + reg);
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}
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static u8 get_pld_version(void)
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{
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return (get_pld_reg(VCMA9_PLD_ID) >> 4) & 0x0F;
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}
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static u8 get_pld_revision(void)
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{
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return get_pld_reg(VCMA9_PLD_ID) & 0x0F;
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}
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static uchar get_board_pcb(void)
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{
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return ((get_pld_reg(VCMA9_PLD_BOARD) >> 4) & 0x03) + 'A';
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}
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static u8 get_nr_chips(void)
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{
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switch ((get_pld_reg(VCMA9_PLD_SDRAM) >> 4) & 0x0F) {
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case 0: return 4;
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case 1: return 1;
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case 2: return 2;
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default: return 0;
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}
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}
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static ulong get_chip_size(void)
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{
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switch (get_pld_reg(VCMA9_PLD_SDRAM) & 0x0F) {
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case 0: return 16 * (1024*1024);
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case 1: return 32 * (1024*1024);
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case 2: return 8 * (1024*1024);
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case 3: return 8 * (1024*1024);
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default: return 0;
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}
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}
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static const char *get_chip_geom(void)
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{
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switch (get_pld_reg(VCMA9_PLD_SDRAM) & 0x0F) {
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case 0: return "4Mx8x4";
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case 1: return "8Mx8x4";
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case 2: return "2Mx8x4";
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case 3: return "4Mx8x2";
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default: return "unknown";
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}
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}
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static void vcma9_show_info(char *board_name, char *serial)
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{
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printf("Board: %s SN: %s PCB Rev: %c PLD(%d,%d)\n",
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board_name, serial,
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get_board_pcb(), get_pld_version(), get_pld_revision());
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printf("SDRAM: %d chips %s\n", get_nr_chips(), get_chip_geom());
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}
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int dram_init(void)
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{
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/* dram_init must store complete ramsize in gd->ram_size */
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gd->ram_size = get_chip_size() * get_nr_chips();
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return 0;
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}
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/*
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* Check Board Identity:
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*/
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int checkboard(void)
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{
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char s[50];
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int i;
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backup_t *b = (backup_t *) s;
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i = getenv_f("serial#", s, 32);
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if ((i < 0) || strncmp (s, "VCMA9", 5)) {
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get_backup_values (b);
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if (strncmp (b->signature, "MPL\0", 4) != 0) {
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puts ("### No HW ID - assuming VCMA9");
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} else {
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b->serial_name[5] = 0;
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vcma9_show_info(b->serial_name, &b->serial_name[6]);
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}
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} else {
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s[5] = 0;
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vcma9_show_info(s, &s[6]);
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}
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return 0;
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}
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int board_late_init(void)
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{
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/*
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* check if environment is healthy, otherwise restore values
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* from shadow copy
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*/
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check_env();
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return 0;
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}
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void vcma9_print_info(void)
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{
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char *s = getenv("serial#");
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if (!s) {
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puts ("### No HW ID - assuming VCMA9");
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} else {
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s[5] = 0;
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vcma9_show_info(s, &s[6]);
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}
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}
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#ifdef CONFIG_CMD_NET
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_CS8900
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rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
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#endif
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return rc;
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}
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#endif
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/*
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* Hardcoded flash setup:
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* Flash 0 is a non-CFI AMD AM29F400BB flash.
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*/
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ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
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{
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info->portwidth = FLASH_CFI_16BIT;
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info->chipwidth = FLASH_CFI_BY16;
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info->interface = FLASH_CFI_X16;
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return 1;
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}
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