mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
148 lines
3.3 KiB
ArmAsm
148 lines
3.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2011 Andes Technology Corporation
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* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
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* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
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*/
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.pic
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.text
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#include <common.h>
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#include <config.h>
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#include <asm/macro.h>
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#include <generated/asm-offsets.h>
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/*
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* parameters for the SDRAM controller
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*/
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#define SDMC_TP1_A (CONFIG_FTSDMC021_BASE + FTSDMC021_TP1)
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#define SDMC_TP2_A (CONFIG_FTSDMC021_BASE + FTSDMC021_TP2)
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#define SDMC_CR1_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR1)
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#define SDMC_CR2_A (CONFIG_FTSDMC021_BASE + FTSDMC021_CR2)
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#define SDMC_B0_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK0_BSR)
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#define SDMC_B1_BSR_A (CONFIG_FTSDMC021_BASE + FTSDMC021_BANK1_BSR)
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#define SDMC_TP1_D CONFIG_SYS_FTSDMC021_TP1
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#define SDMC_TP2_D CONFIG_SYS_FTSDMC021_TP2
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#define SDMC_CR1_D CONFIG_SYS_FTSDMC021_CR1
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#define SDMC_CR2_D CONFIG_SYS_FTSDMC021_CR2
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#define SDMC_B0_BSR_D CONFIG_SYS_FTSDMC021_BANK0_BSR
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#define SDMC_B1_BSR_D CONFIG_SYS_FTSDMC021_BANK1_BSR
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/*
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* for Orca and Emerald
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*/
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#define BOARD_ID_REG 0x104
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#define BOARD_ID_FAMILY_MASK 0xfff000
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#define BOARD_ID_FAMILY_V5 0x556000
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#define BOARD_ID_FAMILY_K7 0x74b000
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/*
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* parameters for the static memory controller
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*/
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#define SMC_BANK0_CR_A (CONFIG_FTSMC020_BASE + FTSMC020_BANK0_CR)
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#define SMC_BANK0_TPR_A (CONFIG_FTSMC020_BASE + FTSMC020_BANK0_TPR)
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#define SMC_BANK0_CR_D FTSMC020_BANK0_LOWLV_CONFIG
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#define SMC_BANK0_TPR_D FTSMC020_BANK0_LOWLV_TIMING
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/*
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* for Orca and Emerald
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*/
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#define AHBC_BSR4_A (CONFIG_FTAHBC020S_BASE + FTAHBC020S_SLAVE_BSR_4)
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#define AHBC_BSR6_D CONFIG_SYS_FTAHBC020S_SLAVE_BSR_6
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/*
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* parameters for the pmu controoler
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*/
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#define PMU_PDLLCR0_A (CONFIG_FTPMU010_BASE + FTPMU010_PDLLCR0)
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/*
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* numeric 7 segment display
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*/
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.macro led, num
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write32 CONFIG_DEBUG_LED, \num
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.endm
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/*
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* Waiting for SDRAM to set up
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*/
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.macro wait_sdram
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li $r0, CONFIG_FTSDMC021_BASE
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1:
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lwi $r1, [$r0+FTSDMC021_CR2]
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bnez $r1, 1b
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.endm
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.globl mem_init
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mem_init:
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move $r11, $lp
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li $r0, SMC_BANK0_CR_A
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lwi $r1, [$r0+#0x00]
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ori $r1, $r1, 0x8f0
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xori $r1, $r1, 0x8f0
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/* 16-bit mode */
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ori $r1, $r1, 0x60
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li $r2, 0x00153153
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swi $r1, [$r0+#0x00]
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swi $r2, [$r0+#0x04]
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move $lp, $r11
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ret
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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.globl lowlevel_init
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lowlevel_init:
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move $r10, $lp
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jal remap
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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jal enable_fpu
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#endif
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ret $r10
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remap:
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move $r11, $lp
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relo_base:
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mfusr $r0, $pc
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#ifdef CONFIG_MEM_REMAP
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li $r4, 0x00000000
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li $r5, 0x80000000
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la $r6, _end@GOTOFF
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1:
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lmw.bim $r12, [$r5], $r19
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smw.bim $r12, [$r4], $r19
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blt $r5, $r6, 1b
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#endif /* #ifdef CONFIG_MEM_REMAP */
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move $lp, $r11
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2:
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ret
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/*
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* enable_fpu:
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* Some of Andes CPU version support FPU coprocessor, if so,
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* and toolchain support FPU instruction set, we should enable it.
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*/
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#if (defined(NDS32_EXT_FPU_DP) || defined(NDS32_EXT_FPU_SP))
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enable_fpu:
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mfsr $r0, $CPU_VER /* enable FPU if it exists */
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srli $r0, $r0, 3
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andi $r0, $r0, 1
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beqz $r0, 1f /* skip if no COP */
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mfsr $r0, $FUCOP_EXIST
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srli $r0, $r0, 31
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beqz $r0, 1f /* skip if no FPU */
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mfsr $r0, $FUCOP_CTL
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ori $r0, $r0, 1
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mtsr $r0, $FUCOP_CTL
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1:
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ret
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#endif
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#endif /* #ifndef CONFIG_SKIP_LOWLEVEL_INIT */
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