688 lines
16 KiB
C
688 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 Gateworks Corporation
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*/
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#include <common.h>
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#include <command.h>
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#include <hang.h>
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#include <hexdump.h>
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#include <i2c.h>
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#include <linux/delay.h>
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#include <dm/uclass.h>
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#include "gsc.h"
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DECLARE_GLOBAL_DATA_PTR;
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struct venice_board_info som_info;
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struct venice_board_info base_info;
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char venice_model[32];
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/* return a mac address from EEPROM info */
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int gsc_getmac(int index, uint8_t *address)
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{
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int i, j;
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u32 maclow, machigh;
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u64 mac;
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j = 0;
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if (som_info.macno) {
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maclow = som_info.mac[5];
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maclow |= som_info.mac[4] << 8;
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maclow |= som_info.mac[3] << 16;
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maclow |= som_info.mac[2] << 24;
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machigh = som_info.mac[1];
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machigh |= som_info.mac[0] << 8;
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mac = machigh;
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mac <<= 32;
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mac |= maclow;
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for (i = 0; i < som_info.macno; i++, j++) {
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if (index == j)
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goto out;
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}
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}
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maclow = base_info.mac[5];
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maclow |= base_info.mac[4] << 8;
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maclow |= base_info.mac[3] << 16;
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maclow |= base_info.mac[2] << 24;
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machigh = base_info.mac[1];
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machigh |= base_info.mac[0] << 8;
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mac = machigh;
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mac <<= 32;
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mac |= maclow;
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for (i = 0; i < base_info.macno; i++, j++) {
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if (index == j)
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goto out;
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}
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return -EINVAL;
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out:
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mac += i;
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address[0] = (mac >> 40) & 0xff;
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address[1] = (mac >> 32) & 0xff;
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address[2] = (mac >> 24) & 0xff;
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address[3] = (mac >> 16) & 0xff;
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address[4] = (mac >> 8) & 0xff;
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address[5] = (mac >> 0) & 0xff;
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return 0;
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}
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/* System Controller registers */
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enum {
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GSC_SC_CTRL0 = 0,
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GSC_SC_CTRL1 = 1,
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GSC_SC_STATUS = 10,
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GSC_SC_FWCRC = 12,
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GSC_SC_FWVER = 14,
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GSC_SC_WP = 15,
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GSC_SC_RST_CAUSE = 16,
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GSC_SC_THERM_PROTECT = 19,
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};
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/* System Controller Control1 bits */
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enum {
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GSC_SC_CTRL1_WDTIME = 4, /* 1 = 60s timeout, 0 = 30s timeout */
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GSC_SC_CTRL1_WDEN = 5, /* 1 = enable, 0 = disable */
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GSC_SC_CTRL1_BOOT_CHK = 6, /* 1 = enable alt boot check */
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GSC_SC_CTRL1_WDDIS = 7, /* 1 = disable boot watchdog */
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};
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/* System Controller Interrupt bits */
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enum {
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GSC_SC_IRQ_PB = 0, /* Pushbutton switch */
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GSC_SC_IRQ_SECURE = 1, /* Secure Key erase operation complete */
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GSC_SC_IRQ_EEPROM_WP = 2, /* EEPROM write violation */
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GSC_SC_IRQ_GPIO = 4, /* GPIO change */
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GSC_SC_IRQ_TAMPER = 5, /* Tamper detect */
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GSC_SC_IRQ_WATCHDOG = 6, /* Watchdog trip */
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GSC_SC_IRQ_PBLONG = 7, /* Pushbutton long hold */
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};
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/* System Controller WP bits */
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enum {
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GSC_SC_WP_ALL = 0, /* Write Protect All EEPROM regions */
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GSC_SC_WP_BOARDINFO = 1, /* Write Protect Board Info region */
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};
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/* System Controller Reset Cause */
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enum {
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GSC_SC_RST_CAUSE_VIN = 0,
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GSC_SC_RST_CAUSE_PB = 1,
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GSC_SC_RST_CAUSE_WDT = 2,
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GSC_SC_RST_CAUSE_CPU = 3,
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GSC_SC_RST_CAUSE_TEMP_LOCAL = 4,
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GSC_SC_RST_CAUSE_TEMP_REMOTE = 5,
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GSC_SC_RST_CAUSE_SLEEP = 6,
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GSC_SC_RST_CAUSE_BOOT_WDT = 7,
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GSC_SC_RST_CAUSE_BOOT_WDT_MAN = 8,
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GSC_SC_RST_CAUSE_SOFT_PWR = 9,
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GSC_SC_RST_CAUSE_MAX = 10,
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};
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static struct udevice *gsc_get_dev(int busno, int slave)
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{
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struct udevice *dev;
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int ret;
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#if (IS_ENABLED(CONFIG_SPL_BUILD))
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ret = i2c_get_chip_for_busnum(busno + 1, slave, 1, &dev);
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if (ret)
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return NULL;
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#else
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struct udevice *bus;
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busno--;
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ret = uclass_get_device_by_seq(UCLASS_I2C, busno, &bus);
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if (ret) {
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printf("i2c%d: no bus %d\n", busno + 1, ret);
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return NULL;
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}
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ret = i2c_get_chip(bus, slave, 1, &dev);
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if (ret) {
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printf("i2c%d@0x%02x: no chip %d\n", busno + 1, slave, ret);
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return NULL;
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}
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#endif
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return dev;
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}
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static int gsc_read_eeprom(int bus, int slave, int alen, struct venice_board_info *info)
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{
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int i;
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int chksum;
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unsigned char *buf = (unsigned char *)info;
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struct udevice *dev;
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int ret;
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/* probe device */
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dev = gsc_get_dev(bus, slave);
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if (!dev) {
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if (slave == GSC_EEPROM_ADDR)
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puts("ERROR: Failed to probe EEPROM\n");
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return -ENODEV;
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}
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/* read eeprom config section */
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memset(info, 0, sizeof(*info));
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ret = i2c_set_chip_offset_len(dev, alen);
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if (ret) {
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puts("EEPROM: Failed to set alen\n");
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return ret;
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}
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ret = dm_i2c_read(dev, 0x00, buf, sizeof(*info));
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if (ret) {
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if (slave == GSC_EEPROM_ADDR)
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printf("EEPROM: Failed to read EEPROM\n");
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return ret;
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}
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/* validate checksum */
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for (chksum = 0, i = 0; i < (int)sizeof(*info) - 2; i++)
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chksum += buf[i];
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if ((info->chksum[0] != chksum >> 8) ||
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(info->chksum[1] != (chksum & 0xff))) {
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printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
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print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
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memset(info, 0, sizeof(*info));
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return -EINVAL;
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}
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/* sanity check valid model */
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if (info->model[0] != 'G' || info->model[1] != 'W') {
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printf("EEPROM: I2C%d@0x%02x: Invalid Model in EEPROM\n", bus, slave);
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print_hex_dump_bytes("", DUMP_PREFIX_NONE, buf, sizeof(*info));
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memset(info, 0, sizeof(*info));
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return -EINVAL;
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}
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return 0;
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}
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static const char *gsc_get_rst_cause(struct udevice *dev)
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{
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static char str[64];
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static const char * const names[] = {
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"VIN",
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"PB",
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"WDT",
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"CPU",
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"TEMP_L",
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"TEMP_R",
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"SLEEP",
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"BOOT_WDT1",
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"BOOT_WDT2",
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"SOFT_PWR",
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};
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unsigned char reg;
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/* reset cause */
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str[0] = 0;
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if (!dm_i2c_read(dev, GSC_SC_RST_CAUSE, ®, 1)) {
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if (reg < ARRAY_SIZE(names))
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sprintf(str, "%s", names[reg]);
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else
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sprintf(str, "0x%02x", reg);
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}
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/* thermal protection */
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if (!dm_i2c_read(dev, GSC_SC_THERM_PROTECT, ®, 1)) {
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reg |= 1;
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dm_i2c_write(dev, GSC_SC_THERM_PROTECT, ®, 1);
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strcat(str, " Thermal Protection Enabled");
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}
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return str;
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}
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/* display hardware monitor ADC channels */
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int gsc_hwmon(void)
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{
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const void *fdt = gd->fdt_blob;
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struct udevice *dev;
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int node, reg, mode, len, val, offset;
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const char *label;
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u8 buf[2];
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int ret;
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node = fdt_node_offset_by_compatible(fdt, -1, "gw,gsc-adc");
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if (node <= 0)
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return node;
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/* probe device */
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dev = gsc_get_dev(1, GSC_HWMON_ADDR);
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if (!dev) {
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puts("ERROR: Failed to probe GSC HWMON\n");
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return -ENODEV;
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}
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/* iterate over hwmon nodes */
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node = fdt_first_subnode(fdt, node);
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while (node > 0) {
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reg = fdtdec_get_int(fdt, node, "reg", -1);
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mode = fdtdec_get_int(fdt, node, "gw,mode", -1);
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offset = fdtdec_get_int(fdt, node, "gw,voltage-offset-microvolt", 0);
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label = fdt_stringlist_get(fdt, node, "label", 0, NULL);
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if ((reg == -1) || (mode == -1) || !label)
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printf("invalid dt:%s\n", fdt_get_name(fdt, node, NULL));
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memset(buf, 0, sizeof(buf));
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ret = dm_i2c_read(dev, reg, buf, sizeof(buf));
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if (ret) {
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printf("i2c error: %d\n", ret);
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continue;
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}
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val = buf[0] | buf[1] << 8;
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if (val >= 0) {
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const u32 *div;
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int r[2];
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switch (mode) {
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case 0: /* temperature (C*10) */
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if (val > 0x8000)
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val -= 0xffff;
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printf("%-8s: %d.%ldC\n", label, val / 10, abs(val % 10));
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break;
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case 1: /* prescaled voltage */
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if (val != 0xffff)
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printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
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break;
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case 2: /* scaled based on ref volt and resolution */
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val *= 2500;
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val /= 1 << 12;
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/* apply pre-scaler voltage divider */
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div = fdt_getprop(fdt, node, "gw,voltage-divider-ohms", &len);
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if (div && (len == sizeof(uint32_t) * 2)) {
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r[0] = fdt32_to_cpu(div[0]);
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r[1] = fdt32_to_cpu(div[1]);
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if (r[0] && r[1]) {
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val *= (r[0] + r[1]);
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val /= r[1];
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}
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}
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/* adjust by offset */
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val += offset;
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printf("%-8s: %d.%03dV\n", label, val / 1000, val % 1000);
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break;
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}
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}
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node = fdt_next_subnode(fdt, node);
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}
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return 0;
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}
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/* determine BOM revision from model */
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int get_bom_rev(const char *str)
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{
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int rev_bom = 0;
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int i;
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for (i = strlen(str) - 1; i > 0; i--) {
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if (str[i] == '-')
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break;
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if (str[i] >= '1' && str[i] <= '9') {
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rev_bom = str[i] - '0';
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break;
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}
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}
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return rev_bom;
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}
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/* determine PCB revision from model */
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char get_pcb_rev(const char *str)
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{
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char rev_pcb = 'A';
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int i;
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for (i = strlen(str) - 1; i > 0; i--) {
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if (str[i] == '-')
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break;
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if (str[i] >= 'A') {
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rev_pcb = str[i];
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break;
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}
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}
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return rev_pcb;
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}
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/*
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* get dt name based on model and detail level:
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*
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* For boards that are a combination of a SoM plus a Baseboard:
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* Venice SoM part numbers are GW70xx where xx is:
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* 7000-7019: same PCB with som dt of '0x'
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* 7020-7039: same PCB with som dt of '2x'
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* 7040-7059: same PCB with som dt of '4x'
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* 7060-7079: same PCB with som dt of '6x'
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* 7080-7099: same PCB with som dt of '8x'
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* Venice Baseboard part numbers are GW7xxx where xxx is:
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* 7100-7199: same PCB with base dt of '71xx'
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* 7200-7299: same PCB with base dt of '72xx'
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* 7300-7399: same PCB with base dt of '73xx'
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* 7400-7499: same PCB with base dt of '74xx'
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* 7500-7599: same PCB with base dt of '75xx'
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* 7600-7699: same PCB with base dt of '76xx'
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* 7700-7799: same PCB with base dt of '77xx'
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* 7800-7899: same PCB with base dt of '78xx'
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* DT name is comprised of:
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* gw<base dt>-<som dt>-[base-pcb-rev][base-bom-rev][som-pcb-rev][som-bom-rev]
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*
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* For board models from 7900-7999 each PCB is unique with its own dt:
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* DT name is comprised:
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* gw<model>-[pcb-rev][bom-rev]
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*
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*/
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#define snprintfcat(dest, sz, fmt, ...) \
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snprintf((dest) + strlen(dest), (sz) - strlen(dest), fmt, ##__VA_ARGS__)
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const char *gsc_get_dtb_name(int level, char *buf, int sz)
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{
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const char *pre = "imx8mm-venice-gw";
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int model, rev_pcb, rev_bom;
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model = ((som_info.model[2] - '0') * 1000)
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+ ((som_info.model[3] - '0') * 100)
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+ ((som_info.model[4] - '0') * 10)
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+ (som_info.model[5] - '0');
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rev_pcb = tolower(get_pcb_rev(som_info.model));
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rev_bom = get_bom_rev(som_info.model);
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/* som + baseboard*/
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if (base_info.model[0]) {
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/* baseboard id: 7100-7199->71; 7200-7299->72; etc */
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int base = ((base_info.model[2] - '0') * 10) + (base_info.model[3] - '0');
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/* som id: 7000-7019->1; 7020-7039->2; etc */
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int som = ((model % 100) / 20) * 2;
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int rev_base_pcb = tolower(get_pcb_rev(base_info.model));
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int rev_base_bom = get_bom_rev(base_info.model);
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snprintf(buf, sz, "%s%2dxx-%dx", pre, base, som);
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switch (level) {
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case 0: /* full model (ie gw73xx-0x-a1a1) */
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if (rev_base_bom)
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snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
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else
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snprintfcat(buf, sz, "-%c", rev_base_pcb);
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if (rev_bom)
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snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
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else
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snprintfcat(buf, sz, "%c", rev_pcb);
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break;
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case 1: /* don't care about SoM revision */
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if (rev_base_bom)
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snprintfcat(buf, sz, "-%c%d", rev_base_pcb, rev_base_bom);
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else
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snprintfcat(buf, sz, "-%c", rev_base_pcb);
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snprintfcat(buf, sz, "xx");
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break;
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case 2: /* don't care about baseboard revision */
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snprintfcat(buf, sz, "-xx");
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if (rev_bom)
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snprintfcat(buf, sz, "%c%d", rev_pcb, rev_bom);
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else
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snprintfcat(buf, sz, "%c", rev_pcb);
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break;
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case 3: /* don't care about SoM/baseboard revision */
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break;
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default:
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return NULL;
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}
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} else {
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snprintf(buf, sz, "%s%04d", pre, model);
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switch (level) {
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case 0: /* full model wth PCB and BOM revision first (ie gw7901-a1) */
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if (rev_bom)
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snprintfcat(buf, sz, "-%c%d", rev_pcb, rev_bom);
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else
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snprintfcat(buf, sz, "-%c", rev_pcb);
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break;
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case 1: /* don't care about BOM revision */
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snprintfcat(buf, sz, "-%c", rev_pcb);
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break;
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case 2: /* don't care about PCB or BOM revision */
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break;
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default:
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return NULL;
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}
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}
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return buf;
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}
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static int gsc_read(void)
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{
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int ret;
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ret = gsc_read_eeprom(1, GSC_EEPROM_ADDR, 1, &som_info);
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if (ret) {
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memset(&som_info, 0, sizeof(som_info));
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return ret;
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}
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/* read optional baseboard EEPROM */
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return gsc_read_eeprom(2, 0x52, 2, &base_info);
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}
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static int gsc_info(int verbose)
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{
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struct udevice *dev;
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unsigned char buf[16];
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char rev_pcb;
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int rev_bom;
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if (!base_info.model[0]) {
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strcpy(venice_model, som_info.model);
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printf("Model : %s\n", som_info.model);
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printf("Serial : %d\n", som_info.serial);
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printf("MFGDate : %02x-%02x-%02x%02x\n",
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som_info.mfgdate[0], som_info.mfgdate[1],
|
|
som_info.mfgdate[2], som_info.mfgdate[3]);
|
|
} else {
|
|
sprintf(venice_model, "GW%c%c%c%c-%c%c-",
|
|
som_info.model[2], /* family */
|
|
base_info.model[3], /* baseboard */
|
|
base_info.model[4], base_info.model[5], /* subload of baseboard */
|
|
som_info.model[4], som_info.model[5]); /* last 2digits of SOM */
|
|
|
|
/* baseboard revision */
|
|
rev_pcb = get_pcb_rev(base_info.model);
|
|
rev_bom = get_bom_rev(base_info.model);
|
|
if (rev_bom)
|
|
sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
|
|
else
|
|
sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
|
|
/* som revision */
|
|
rev_pcb = get_pcb_rev(som_info.model);
|
|
rev_bom = get_bom_rev(som_info.model);
|
|
if (rev_bom)
|
|
sprintf(venice_model + strlen(venice_model), "%c%d", rev_pcb, rev_bom);
|
|
else
|
|
sprintf(venice_model + strlen(venice_model), "%c", rev_pcb);
|
|
|
|
if (verbose > 1) {
|
|
printf("SOM : %s %d %02x-%02x-%02x%02x\n",
|
|
som_info.model, som_info.serial,
|
|
som_info.mfgdate[0], som_info.mfgdate[1],
|
|
som_info.mfgdate[2], som_info.mfgdate[3]);
|
|
printf("BASE : %s %d %02x-%02x-%02x%02x\n",
|
|
base_info.model, base_info.serial,
|
|
base_info.mfgdate[0], base_info.mfgdate[1],
|
|
base_info.mfgdate[2], base_info.mfgdate[3]);
|
|
}
|
|
printf("Model : %s\n", venice_model);
|
|
printf("Serial : %d\n", som_info.serial);
|
|
printf("MFGDate : %02x-%02x-%02x%02x\n",
|
|
som_info.mfgdate[0], som_info.mfgdate[1],
|
|
som_info.mfgdate[2], som_info.mfgdate[3]);
|
|
}
|
|
|
|
/* Display RTC */
|
|
puts("RTC : ");
|
|
dev = gsc_get_dev(1, GSC_RTC_ADDR);
|
|
if (!dev) {
|
|
puts("Failed to probe GSC RTC\n");
|
|
} else {
|
|
dm_i2c_read(dev, 0, buf, 6);
|
|
printf("%d\n", buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
int gsc_init(int quiet)
|
|
{
|
|
unsigned char buf[16];
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
/*
|
|
* On a board with a missing/depleted backup battery for GSC, the
|
|
* board may be ready to probe the GSC before its firmware is
|
|
* running. We will wait here indefinately for the GSC/EEPROM.
|
|
*/
|
|
while (1) {
|
|
/* probe device */
|
|
dev = gsc_get_dev(1, GSC_SC_ADDR);
|
|
if (dev)
|
|
break;
|
|
mdelay(1);
|
|
}
|
|
|
|
ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
|
|
if (ret) {
|
|
puts("ERROR: Failed reading GSC\n");
|
|
return ret;
|
|
}
|
|
gsc_read();
|
|
|
|
/* banner */
|
|
if (!quiet) {
|
|
printf("GSC : v%d 0x%04x", buf[GSC_SC_FWVER],
|
|
buf[GSC_SC_FWCRC] | buf[GSC_SC_FWCRC + 1] << 8);
|
|
printf(" RST:%s", gsc_get_rst_cause(dev));
|
|
printf("\n");
|
|
gsc_info(1);
|
|
}
|
|
|
|
if (ret)
|
|
hang();
|
|
|
|
return ((16 << som_info.sdram_size) / 1024);
|
|
}
|
|
|
|
const char *gsc_get_model(void)
|
|
{
|
|
return venice_model;
|
|
}
|
|
|
|
#if !(IS_ENABLED(CONFIG_SPL_BUILD))
|
|
static int gsc_sleep(unsigned long secs)
|
|
{
|
|
unsigned char reg;
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
/* probe device */
|
|
dev = gsc_get_dev(1, GSC_SC_ADDR);
|
|
if (!dev)
|
|
return -ENODEV;
|
|
|
|
printf("GSC Sleeping for %ld seconds\n", secs);
|
|
reg = (secs >> 24) & 0xff;
|
|
ret = dm_i2c_write(dev, 9, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg = (secs >> 16) & 0xff;
|
|
ret = dm_i2c_write(dev, 8, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg = (secs >> 8) & 0xff;
|
|
ret = dm_i2c_write(dev, 7, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg = secs & 0xff;
|
|
ret = dm_i2c_write(dev, 6, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
ret = dm_i2c_read(dev, GSC_SC_CTRL1, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg |= (1 << 2);
|
|
ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg &= ~(1 << 2);
|
|
reg |= 0x3;
|
|
ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
|
|
return 0;
|
|
|
|
err:
|
|
printf("i2c error\n");
|
|
return ret;
|
|
}
|
|
|
|
static int gsc_boot_wd_disable(void)
|
|
{
|
|
u8 reg;
|
|
struct udevice *dev;
|
|
int ret;
|
|
|
|
/* probe device */
|
|
dev = gsc_get_dev(1, GSC_SC_ADDR);
|
|
if (!dev)
|
|
return -ENODEV;
|
|
|
|
ret = dm_i2c_read(dev, GSC_SC_CTRL1, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
reg |= (1 << GSC_SC_CTRL1_WDDIS);
|
|
reg &= ~(1 << GSC_SC_CTRL1_BOOT_CHK);
|
|
ret = dm_i2c_write(dev, GSC_SC_CTRL1, ®, 1);
|
|
if (ret)
|
|
goto err;
|
|
puts("GSC : boot watchdog disabled\n");
|
|
|
|
return 0;
|
|
|
|
err:
|
|
printf("i2c error");
|
|
return ret;
|
|
}
|
|
|
|
static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
|
|
{
|
|
if (argc < 2)
|
|
return gsc_info(2);
|
|
|
|
if (strcasecmp(argv[1], "sleep") == 0) {
|
|
if (argc < 3)
|
|
return CMD_RET_USAGE;
|
|
if (!gsc_sleep(simple_strtoul(argv[2], NULL, 10)))
|
|
return CMD_RET_SUCCESS;
|
|
} else if (strcasecmp(argv[1], "hwmon") == 0) {
|
|
if (!gsc_hwmon())
|
|
return CMD_RET_SUCCESS;
|
|
} else if (strcasecmp(argv[1], "wd-disable") == 0) {
|
|
if (!gsc_boot_wd_disable())
|
|
return CMD_RET_SUCCESS;
|
|
}
|
|
|
|
return CMD_RET_USAGE;
|
|
}
|
|
|
|
U_BOOT_CMD(gsc, 4, 1, do_gsc, "Gateworks System Controller",
|
|
"[sleep <secs>]|[hwmon]|[wd-disable]\n");
|
|
#endif
|