Lokesh Vutla 5298f21ab3 ARM: DRA7xx: Change clk divider setting ... Commit "armv7: hw_data: change clock divider setting" updates the setting for m6 divider for 20MHz sys_clk frequency. But missed to update for other sys_clk frequencies. Doing the same. Reported-by: Rajendran, Vinothkumar <vinothr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2013-12-12 17:43:39 -05:00
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abb.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
config.mk	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
emif.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
hw_data.c	ARM: DRA7xx: Change clk divider setting	2013-12-12 17:43:39 -05:00
hwinit.c	ARM: OMAP5+: Remove unnecessary EFUSE settings	2013-12-04 08:12:38 -05:00
Makefile	armv7: convert makefiles to Kbuild style	2013-10-31 12:53:39 -04:00
prcm-regs.c	ARM: DRA7xx: Add PRCM and Control information for SATA	2013-12-04 08:12:09 -05:00
sdram.c	ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039	2013-12-04 08:12:08 -05:00