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![]() The resets to DDR and ethernet sub-system are connected to PRCI device reset control register, these reset signals are active low and are held low at power-up. Add these reset producer and consumer details needed by the reset driver. Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> |
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.. | ||
ae350_32.dts | ||
ae350_64.dts | ||
fu540-c000-u-boot.dtsi | ||
fu540-c000.dtsi | ||
fu540-hifive-unleashed-a00-ddr.dtsi | ||
hifive-unleashed-a00-u-boot.dtsi | ||
hifive-unleashed-a00.dts | ||
k210-maix-bit.dts | ||
k210.dtsi | ||
Makefile |