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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 01:18:52 +09:00
![Jon Nettleton](/assets/img/avatar_default.png)
The production variant of the SPI flash used by the clearfog devices are based on winbond chips. Additionally enable SPI_FLASH_BAR since some variants will have 16MB of flash that requires this to be enabled. Remove the default speed and mode; these values are taken from the device tree when CONFIG_DM_SPI_FLASH is enabled. Add default bus, so that 'sf' detects the SPI flash by default. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: remove speed/mode; add bus; move winbond to defconfig] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Stefan Roese <sr@denx.de>
52 lines
1.2 KiB
Plaintext
52 lines
1.2 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_MVEBU=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_TARGET_CLEARFOG=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_LIBDISK_SUPPORT=y
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CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
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CONFIG_DEBUG_UART=y
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_CONSOLE_INFO_QUIET=y
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_SPL=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141
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CONFIG_SPL_I2C_SUPPORT=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_USB=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TFTPPUT=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIME=y
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# CONFIG_SPL_PARTITION_UUIDS is not set
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SPL_OF_TRANSLATE=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_MV=y
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CONFIG_SPI_FLASH=y
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CONFIG_PHY_GIGE=y
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CONFIG_MVNETA=y
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CONFIG_PCI=y
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CONFIG_DEBUG_UART_BASE=0xd0012000
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CONFIG_DEBUG_UART_CLOCK=250000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_USB=y
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CONFIG_DM_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_MVEBU=y
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CONFIG_USB_STORAGE=y
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CONFIG_SPI_FLASH_BAR=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_SPI_FLASH_MTD=y
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