mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-27 23:20:26 +09:00
5256beecb8
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.
Example output:
Timer summary in microseconds (14 records):
Mark Elapsed Stage
0 0 reset
224,787 224,787 TPL
282,248 57,461 end TPL
341,067 58,819 SPL
925,436 584,369 end SPL
931,710 6,274 board_init_f
1,035,482 103,772 board_init_r
1,387,852 352,370 main_loop
1,387,911 59 id=175
Accumulated time:
196 dm_r
8,300 dm_spl
14,139 dm_f
229,121 fsp-m
262,992 fsp-s
Signed-off-by: Simon Glass <sjg@chromium.org>
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|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| spl_atf.c | ||
| spl_bootrom.c | ||
| spl_dfu.c | ||
| spl_ext.c | ||
| spl_fat.c | ||
| spl_fit.c | ||
| spl_mmc.c | ||
| spl_nand.c | ||
| spl_net.c | ||
| spl_nor.c | ||
| spl_onenand.c | ||
| spl_opensbi.c | ||
| spl_optee.S | ||
| spl_ram.c | ||
| spl_sata.c | ||
| spl_sdp.c | ||
| spl_spi.c | ||
| spl_ubi.c | ||
| spl_usb.c | ||
| spl_xip.c | ||
| spl_ymodem.c | ||
| spl.c | ||