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https://github.com/brain-hackers/u-boot-brain
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![Sanchayan Maity](/assets/img/avatar_default.png)
This adds initial support for Colibri VF50/VF61 based on Freescale Vybrid SoC. - CPU clocked at 396/500 MHz - DDR3 at 396MHz - for VF50, use PLL2 as memory clock (synchronous mode) - for VF61, use PLL1 as memory clock (asynchronous mode) - Console on UART0 (Colibri UART_A) - Ethernet on FEC1 - PLL5 based RMII clocking (E.g. No external crystal) - UART_A and UART_C I/O muxing - Boot from NAND by default Tested on Colibri VF50/VF61 booting using serial loader over UART. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
18 lines
418 B
INI
18 lines
418 B
INI
/*
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* Copyright 2014 Toradex, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Refer docs/README.imxmage for more details about how-to configure
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* and create imximage boot image
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*
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* The syntax is taken as close as possible with the kwbimage
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*/
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#include <asm/imx-common/imximage.cfg>
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/* image version */
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IMAGE_VERSION 2
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/* Boot Offset 0x400, valid for both SD and NAND boot */
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BOOT_OFFSET FLASH_OFFSET_STANDARD
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