mirror of
https://github.com/brain-hackers/u-boot-brain
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323d1f9d5b
Before this commit, the Kconfig menu in mach-uniphier only allowed us
to choose one SoC to be compiled. Each SoC has its own defconfig file
for the build-test coverage. Consequently, some defconfig files are
duplicated with only the difference in CONFIG_DEFAULT_DEVICE_TREE and
CONFIG_{SOC_NAME}=y.
Now, most of board-specific parameters have been moved to device trees,
so it makes sense to include init code of multiple SoCs into a single
image as long as the SoCs have similar architecture. In fact, some
SoCs of UniPhier family are very similar:
- PH1-LD4 and PH1-sLD8
- PH1-LD6b and ProXstream2 (will be added in the upcoming commit)
This commit will be helpful to merge some defconfig files for better
maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
51 lines
1.7 KiB
C
51 lines
1.7 KiB
C
/*
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* Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/io.h>
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#include <mach/init.h>
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#include <mach/sg-regs.h>
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void ph1_pro4_pin_init(void)
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{
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/* Comment format: PAD Name -> Function Name */
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#ifdef CONFIG_NAND_DENALI
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sg_set_pinsel(40, 0, 4, 8); /* NFD0 -> NFD0 */
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sg_set_pinsel(41, 0, 4, 8); /* NFD1 -> NFD1 */
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sg_set_pinsel(42, 0, 4, 8); /* NFD2 -> NFD2 */
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sg_set_pinsel(43, 0, 4, 8); /* NFD3 -> NFD3 */
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sg_set_pinsel(44, 0, 4, 8); /* NFD4 -> NFD4 */
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sg_set_pinsel(45, 0, 4, 8); /* NFD5 -> NFD5 */
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sg_set_pinsel(46, 0, 4, 8); /* NFD6 -> NFD6 */
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sg_set_pinsel(47, 0, 4, 8); /* NFD7 -> NFD7 */
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sg_set_pinsel(48, 0, 4, 8); /* NFALE -> NFALE */
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sg_set_pinsel(49, 0, 4, 8); /* NFCLE -> NFCLE */
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sg_set_pinsel(50, 0, 4, 8); /* XNFRE -> XNFRE */
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sg_set_pinsel(51, 0, 4, 8); /* XNFWE -> XNFWE */
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sg_set_pinsel(52, 0, 4, 8); /* XNFWP -> XNFWP */
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sg_set_pinsel(53, 0, 4, 8); /* XNFCE0 -> XNFCE0 */
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sg_set_pinsel(54, 0, 4, 8); /* NRYBY0 -> NRYBY0 */
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/* sg_set_pinsel(131, 1, 4, 8); */ /* RXD2 -> NRYBY1 */
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/* sg_set_pinsel(132, 1, 4, 8); */ /* TXD2 -> XNFCE1 */
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#endif
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#ifdef CONFIG_USB_XHCI_UNIPHIER
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sg_set_pinsel(180, 0, 4, 8); /* USB0VBUS -> USB0VBUS */
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sg_set_pinsel(181, 0, 4, 8); /* USB0OD -> USB0OD */
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sg_set_pinsel(182, 0, 4, 8); /* USB1VBUS -> USB1VBUS */
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sg_set_pinsel(183, 0, 4, 8); /* USB1OD -> USB1OD */
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#endif
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#ifdef CONFIG_USB_EHCI_UNIPHIER
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sg_set_pinsel(184, 0, 4, 8); /* USB2VBUS -> USB2VBUS */
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sg_set_pinsel(185, 0, 4, 8); /* USB2OD -> USB2OD */
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sg_set_pinsel(187, 0, 4, 8); /* USB3VBUS -> USB3VBUS */
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sg_set_pinsel(188, 0, 4, 8); /* USB3OD -> USB3OD */
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#endif
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writel(1, SG_LOADPINCTRL);
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}
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