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![Sonic Zhang](/assets/img/avatar_default.png)
- Move blackfin serial driver to the generic driver folder. - Move blackfin serial headers to blackfin arch head folder. - Update the include path to blackfin serial header in start up code. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
151 lines
3.4 KiB
C
151 lines
3.4 KiB
C
/*
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* serial.h - common serial defines for early debug and serial driver.
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* any functions defined here must be always_inline since
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* initcode cannot have function calls.
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*
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* Copyright (c) 2004-2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BFIN_CPU_SERIAL4_H__
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#define __BFIN_CPU_SERIAL4_H__
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#include <asm/mach-common/bits/uart4.h>
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#ifndef __ASSEMBLY__
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#include <asm/clock.h>
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#define MMR_UART(n) _PASTE_UART(n, UART, REVID)
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#define UART_BASE MMR_UART(CONFIG_UART_CONSOLE)
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struct bfin_mmr_serial {
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u32 revid;
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u32 control;
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u32 status;
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u32 scr;
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u32 clock;
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u32 emask;
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u32 emaskst;
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u32 emaskcl;
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u32 rbr;
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u32 thr;
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u32 taip;
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u32 tsr;
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u32 rsr;
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u32 txdiv_cnt;
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u32 rxdiv_cnt;
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};
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#define uart_lsr_t uint32_t
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#define _lsr_read(p) bfin_read(&p->status)
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#define _lsr_write(p, v) bfin_write(&p->status, v)
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__attribute__((always_inline))
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static inline void serial_early_do_mach_portmux(char port, int mux_mask,
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int mux_func, int port_pin)
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{
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switch (port) {
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case 'D':
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bfin_write_PORTD_MUX((bfin_read_PORTD_MUX() &
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~mux_mask) | mux_func);
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bfin_write_PORTD_FER_SET(port_pin);
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break;
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case 'G':
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bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() &
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~mux_mask) | mux_func);
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bfin_write_PORTG_FER_SET(port_pin);
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break;
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}
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}
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__attribute__((always_inline))
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static inline void serial_early_do_portmux(void)
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{
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#if defined(__ADSPBF60x__)
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switch (CONFIG_UART_CONSOLE) {
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case 0:
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serial_early_do_mach_portmux('D', PORT_x_MUX_7_MASK,
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PORT_x_MUX_7_FUNC_2, PD7); /* TX: D; mux 7; func 2; PD7 */
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serial_early_do_mach_portmux('D', PORT_x_MUX_8_MASK,
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PORT_x_MUX_8_FUNC_2, PD8); /* RX: D; mux 8; func 2; PD8 */
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break;
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case 1:
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serial_early_do_mach_portmux('G', PORT_x_MUX_15_MASK,
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PORT_x_MUX_15_FUNC_1, PG15); /* TX: G; mux 15; func 1; PG15 */
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serial_early_do_mach_portmux('G', PORT_x_MUX_14_MASK,
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PORT_x_MUX_14_FUNC_1, PG14); /* RX: G; mux 14; func 1; PG14 */
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break;
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}
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#else
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# if (P_UART(RX) & P_DEFINED) || (P_UART(TX) & P_DEFINED)
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# error "missing portmux logic for UART"
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# endif
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#endif
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SSYNC();
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}
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__attribute__((always_inline))
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static inline int uart_init(uint32_t uart_base)
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{
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/* always enable UART to 8-bit mode */
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bfin_write(&pUART->control, UEN | UMOD_UART | WLS_8);
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SSYNC();
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return 0;
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}
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__attribute__((always_inline))
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static inline int serial_early_init(uint32_t uart_base)
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{
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/* handle portmux crap on different Blackfins */
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serial_do_portmux();
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return uart_init(uart_base);
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}
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__attribute__((always_inline))
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static inline int serial_early_uninit(uint32_t uart_base)
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{
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/* disable the UART by clearing UEN */
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bfin_write(&pUART->control, 0);
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return 0;
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}
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__attribute__((always_inline))
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static inline void serial_set_divisor(uint32_t uart_base, uint16_t divisor)
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{
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/* Program the divisor to get the baud rate we want */
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bfin_write(&pUART->clock, divisor);
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SSYNC();
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}
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__attribute__((always_inline))
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static inline void serial_early_set_baud(uint32_t uart_base, uint32_t baud)
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{
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uint16_t divisor = early_division(early_get_uart_clk(), baud * 16);
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/* Program the divisor to get the baud rate we want */
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serial_set_divisor(uart_base, divisor);
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}
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__attribute__((always_inline))
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static inline void serial_early_put_div(uint32_t divisor)
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{
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uint32_t uart_base = UART_BASE;
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bfin_write(&pUART->clock, divisor);
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}
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__attribute__((always_inline))
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static inline uint32_t serial_early_get_div(void)
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{
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uint32_t uart_base = UART_BASE;
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return bfin_read(&pUART->clock);
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}
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#endif
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#endif
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