mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 10:46:15 +09:00
511fc86d0b
- Add SD secure boot target for ls1046ardb. - Change the u-boot size defined by a macro for copying the main U-Boot by SPL to also include the u-boot Secure Boot header size as header is appended to u-boot image. So header will also be copied from SD to DDR. - CONFIG_MAX_SPL_SIZE is limited to 90KB. SPL is copied to OCRAM (128K) where 32K are reserved for use by boot ROM and 6K for the header. - Reduce the size of CAAM driver for SPL Blobification functions and descriptors, that are not required at the time of SPL are disabled. Further error code conversion to strings is disabled for SPL build. Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
148 lines
4.5 KiB
C
148 lines
4.5 KiB
C
/*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __FSL_SECURE_BOOT_H
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#define __FSL_SECURE_BOOT_H
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#ifdef CONFIG_CHAIN_OF_TRUST
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#define CONFIG_CMD_ESBC_VALIDATE
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#define CONFIG_FSL_SEC_MON
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#define CONFIG_SHA_HW_ACCEL
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#define CONFIG_SHA_PROG_HW_ACCEL
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#define CONFIG_SPL_BOARD_INIT
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#ifdef CONFIG_SPL_BUILD
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/*
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* Define the key hash for U-Boot here if public/private key pair used to
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* sign U-boot are different from the SRK hash put in the fuse
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* Example of defining KEY_HASH is
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* #define CONFIG_SPL_UBOOT_KEY_HASH \
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* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
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* else leave it defined as NULL
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*/
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#define CONFIG_SPL_UBOOT_KEY_HASH NULL
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#endif /* ifdef CONFIG_SPL_BUILD */
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#define CONFIG_KEY_REVOCATION
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#ifndef CONFIG_SPL_BUILD
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#define CONFIG_CMD_BLOB
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#define CONFIG_CMD_HASH
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#ifndef CONFIG_SYS_RAMBOOT
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/* The key used for verification of next level images
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* is picked up from an Extension Table which has
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* been verified by the ISBC (Internal Secure boot Code)
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* in boot ROM of the SoC.
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* The feature is only applicable in case of NOR boot and is
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* not applicable in case of RAMBOOT (NAND, SD, SPI).
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* For LS, this feature is available for all device if IE Table
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* is copied to XIP memory
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* Also, for LS, ISBC doesn't verify this table.
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*/
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#define CONFIG_FSL_ISBC_KEY_EXT
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#endif
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#if defined(CONFIG_FSL_LAYERSCAPE)
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/*
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* For fsl layerscape based platforms, ESBC image Address in Header
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* is 64 bit.
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*/
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#define CONFIG_ESBC_ADDR_64BIT
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#endif
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#ifdef CONFIG_LS2080A
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#define CONFIG_EXTRA_ENV \
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"setenv fdt_high 0xa0000000;" \
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"setenv initrd_high 0xcfffffff;" \
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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#else
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#define CONFIG_EXTRA_ENV \
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"setenv fdt_high 0xffffffff;" \
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"setenv initrd_high 0xffffffff;" \
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"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
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#endif
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/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
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* Non-XIP Memory (Nand/SD)*/
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#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
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defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
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#define CONFIG_BOOTSCRIPT_COPY_RAM
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#endif
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/* The address needs to be modified according to NOR, NAND, SD and
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* DDR memory map
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*/
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#ifdef CONFIG_FSL_LSCH3
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
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#define CONFIG_BS_ADDR_DEVICE 0x580e00000
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#define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
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#define CONFIG_BS_ADDR_RAM 0xa0e00000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#else
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#ifdef CONFIG_SD_BOOT
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/* For SD boot address and size are assigned in terms of sector
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* offset and no. of sectors respectively.
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*/
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#if defined(CONFIG_LS1043A) || defined(CONFIG_ARCH_LS1046A)
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
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#else
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
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#endif
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#define CONFIG_BS_ADDR_DEVICE 0x00000940
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#define CONFIG_BS_HDR_SIZE 0x00000010
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#define CONFIG_BS_SIZE 0x00000008
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#elif defined(CONFIG_NAND_BOOT)
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
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#define CONFIG_BS_ADDR_DEVICE 0x00802000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#elif defined(CONFIG_QSPI_BOOT)
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#ifdef CONFIG_ARCH_LS1046A
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
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#define CONFIG_BS_ADDR_DEVICE 0x40800000
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#elif defined(CONFIG_ARCH_LS1012A)
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
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#define CONFIG_BS_ADDR_DEVICE 0x40060000
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#else
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#error "Platform not supported"
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#endif
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#else /* Default NOR Boot */
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#define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
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#define CONFIG_BS_ADDR_DEVICE 0x60060000
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#define CONFIG_BS_HDR_SIZE 0x00002000
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#define CONFIG_BS_SIZE 0x00001000
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#endif
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#define CONFIG_BS_HDR_ADDR_RAM 0x81000000
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#define CONFIG_BS_ADDR_RAM 0x81020000
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#endif
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#ifdef CONFIG_BOOTSCRIPT_COPY_RAM
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
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#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
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#else
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#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
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/* BOOTSCRIPT_ADDR is not required */
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#endif
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#ifdef CONFIG_FSL_LS_PPA
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/* Define the key hash here if SRK used for signing PPA image is
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* different from SRK hash put in SFP used for U-Boot.
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* Example
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* #define PPA_KEY_HASH \
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* "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
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*/
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#define PPA_KEY_HASH NULL
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#endif /* ifdef CONFIG_FSL_LS_PPA */
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#include <config_fsl_chain_trust.h>
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#endif /* #ifndef CONFIG_SPL_BUILD */
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#endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
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#endif
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