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https://github.com/brain-hackers/u-boot-brain
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1b409828b1
Implement soc level functions to get cpu rev, reset cause, enable cache, etc. We will disable the wdog and init clocks in s_init at very early u-boot phase. Since the we are seeking the way to get chip id for mx7ulp, the get_cpu_rev is hard coded to a fixed value. This may change in future. Reuse some code in imx-common. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
22 lines
408 B
C
22 lines
408 B
C
/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYS_PROTO_MX7ULP_H_
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#define _SYS_PROTO_MX7ULP_H_
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#include <asm/imx-common/sys_proto.h>
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#define BT0CFG_LPBOOT_MASK 0x1
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#define BT0CFG_DUALBOOT_MASK 0x2
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enum bt_mode {
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LOW_POWER_BOOT, /* LP_BT = 1 */
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DUAL_BOOT, /* LP_BT = 0, DUAL_BT = 1 */
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SINGLE_BOOT /* LP_BT = 0, DUAL_BT = 0 */
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};
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#endif
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