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50899183c9
Currently there are two sets of omap_gpmc.h header files (a) arch/arm/include/asm/omap_gpmc.h common header file for all platforms, containing defines and declarations used by GPMC NAND driver. (b) arch/arm/include/asm/arch-xx/omap_gpmc.h SoC platform specific header file containing defines like ECC layout. This patch removes platform specific arch-xx/omap_gpmc.c because: - GPMC hardware engine is common for all SoC platforms hence only (a) is enough - ECC layout is now defined in omap_nand.c driver itself based on ecc-scheme selected. Hence all ECC layout declarations in (b) are redundant. Build tested using: ./MAKEALL -s am33xx -s omap3 -s omap4 -s omap5 Signed-off-by: Pekon Gupta <pekon@ti.com>
79 lines
1.9 KiB
C
79 lines
1.9 KiB
C
/*
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* (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
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* Rohit Choraria <rohitkc@ti.com>
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*
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* (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_OMAP_GPMC_H
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#define __ASM_OMAP_GPMC_H
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#define GPMC_BUF_EMPTY 0
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#define GPMC_BUF_FULL 1
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/* Generic ECC Layouts */
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/* Large Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
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9, 10, 11, 12},\
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.oobfree = {\
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{.offset = 13,\
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.length = 51 } } \
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}
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#endif
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/* Large Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 12,\
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.eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
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10, 11, 12, 13},\
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.oobfree = {\
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{.offset = 14,\
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.length = 50 } } \
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}
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#endif
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/* Small Page x8 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {1, 2, 3},\
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.oobfree = {\
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{.offset = 4,\
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.length = 12 } } \
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}
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#endif
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/* Small Page x16 NAND device Layout */
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#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
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#define GPMC_NAND_HW_ECC_LAYOUT {\
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.eccbytes = 3,\
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.eccpos = {2, 3, 4},\
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.oobfree = {\
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{.offset = 5,\
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.length = 11 } } \
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}
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#endif
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enum omap_ecc {
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/* 1-bit ECC calculation by Software, Error detection by Software */
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OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
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/* 1-bit ECC calculation by GPMC, Error detection by Software */
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/* ECC layout compatible to legacy ROMCODE. */
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OMAP_ECC_HAM1_CODE_HW,
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/* 4-bit ECC calculation by GPMC, Error detection by Software */
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OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
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/* 4-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH4_CODE_HW,
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/* 8-bit ECC calculation by GPMC, Error detection by Software */
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OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
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/* 8-bit ECC calculation by GPMC, Error detection by ELM */
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OMAP_ECC_BCH8_CODE_HW,
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};
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#endif /* __ASM_OMAP_GPMC_H */
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