mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
108 lines
2.7 KiB
C
108 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2002 (440 port)
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* Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
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*
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* (C) Copyright 2003 Motorola Inc. (MPC85xx port)
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* Xianghua Xiao (X.Xiao@motorola.com)
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#ifdef CONFIG_POST
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#include <post.h>
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#endif
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void interrupt_init_cpu(unsigned *decrementer_count)
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{
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ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
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#ifdef CONFIG_POST
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/*
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* The POST word is stored in the PIC's TFRR register which gets
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* cleared when the PIC is reset. Save it off so we can restore it
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* later.
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*/
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ulong post_word = post_word_load();
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#endif
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out_be32(&pic->gcr, MPC85xx_PICGCR_RST);
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while (in_be32(&pic->gcr) & MPC85xx_PICGCR_RST)
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;
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out_be32(&pic->gcr, MPC85xx_PICGCR_M);
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in_be32(&pic->gcr);
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*decrementer_count = get_tbclk() / CONFIG_SYS_HZ;
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/* PIE is same as DIE, dec interrupt enable */
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mtspr(SPRN_TCR, mfspr(SPRN_TCR) | TCR_PIE);
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#ifdef CONFIG_INTERRUPTS
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pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
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debug("iivpr1@%x = %x\n", (uint)&pic->iivpr1, pic->iivpr1);
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pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
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debug("iivpr2@%x = %x\n", (uint)&pic->iivpr2, pic->iivpr2);
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pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
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debug("iivpr3@%x = %x\n", (uint)&pic->iivpr3, pic->iivpr3);
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#ifdef CONFIG_PCI1
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pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
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debug("iivpr8@%x = %x\n", (uint)&pic->iivpr8, pic->iivpr8);
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#endif
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#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
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pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
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debug("iivpr9@%x = %x\n", (uint)&pic->iivpr9, pic->iivpr9);
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#endif
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#ifdef CONFIG_PCIE1
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pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
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debug("iivpr10@%x = %x\n", (uint)&pic->iivpr10, pic->iivpr10);
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#endif
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#ifdef CONFIG_PCIE3
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pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
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debug("iivpr11@%x = %x\n", (uint)&pic->iivpr11, pic->iivpr11);
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#endif
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pic->ctpr=0; /* 40080 clear current task priority register */
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#endif
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#ifdef CONFIG_POST
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post_word_store(post_word);
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#endif
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}
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/* Install and free a interrupt handler. Not implemented yet. */
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void
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irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
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{
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return;
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}
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void
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irq_free_handler(int vec)
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{
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return;
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}
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void timer_interrupt_cpu(struct pt_regs *regs)
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{
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/* PIS is same as DIS, dec interrupt status */
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mtspr(SPRN_TSR, TSR_PIS);
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}
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#if defined(CONFIG_CMD_IRQ)
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/* irqinfo - print information about PCI devices,not implemented. */
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int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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return 0;
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}
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#endif
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