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https://github.com/brain-hackers/u-boot-brain
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5025897774
There was for long time no activity in the 5xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 5xx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
249 lines
6.0 KiB
Cheetah
249 lines
6.0 KiB
Cheetah
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* This file contains all the macros and symbols which define
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* a PowerPC assembly language environment.
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*/
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#ifndef __PPC_ASM_TMPL__
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#define __PPC_ASM_TMPL__
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#include <config.h>
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/***************************************************************************
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*
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* These definitions simplify the ugly declarations necessary for GOT
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* definitions.
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*
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* Stolen from prepboot/bootldr.h, (C) 1998 Gabriel Paubert, paubert@iram.es
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*
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* Uses r12 to access the GOT
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*/
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#define START_GOT \
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.section ".got2","aw"; \
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.LCTOC1 = .+32768
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#define END_GOT \
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.text
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#define GET_GOT \
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bl 1f ; \
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.text 2 ; \
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0: .long .LCTOC1-1f ; \
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.text ; \
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1: mflr r12 ; \
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lwz r0,0b-1b(r12) ; \
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add r12,r0,r12 ;
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#define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME
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#define GOT(NAME) .L_ ## NAME (r12)
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/***************************************************************************
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* Register names
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*/
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#define r0 0
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#define r1 1
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#define r2 2
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#define r3 3
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#define r4 4
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#define r5 5
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#define r6 6
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#define r7 7
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#define r8 8
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#define r9 9
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#define r10 10
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#define r11 11
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#define r12 12
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#define r13 13
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#define r14 14
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#define r15 15
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#define r16 16
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#define r17 17
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#define r18 18
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#define r19 19
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#define r20 20
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#define r21 21
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#define r22 22
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#define r23 23
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#define r24 24
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#define r25 25
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#define r26 26
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#define r27 27
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#define r28 28
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#define r29 29
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#define r30 30
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#define r31 31
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#if defined(CONFIG_MPC5xxx)
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#define HID0_ICE_BITPOS 16
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#define HID0_DCE_BITPOS 17
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#endif
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#define curptr r2
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#define SYNC \
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sync; \
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isync
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/*
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* Macros for storing registers into and loading registers from
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* exception frames.
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*/
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#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base)
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#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base)
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#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base)
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#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base)
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#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base)
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#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base)
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#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base)
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#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base)
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#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base)
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#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base)
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/*
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* GCC sometimes accesses words at negative offsets from the stack
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* pointer, although the SysV ABI says it shouldn't. To cope with
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* this, we leave this much untouched space on the stack on exception
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* entry.
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*/
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#define STACK_UNDERHEAD 64
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/*
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* Exception entry code. This code runs with address translation
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* turned off, i.e. using physical addresses.
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* We assume sprg3 has the physical address of the current
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* task's thread_struct.
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*/
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#define EXCEPTION_PROLOG(reg1, reg2) \
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mtspr SPRG0,r20; \
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mtspr SPRG1,r21; \
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mfcr r20; \
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subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\
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stw r20,_CCR(r21); /* save registers */ \
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stw r22,GPR22(r21); \
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stw r23,GPR23(r21); \
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mfspr r20,SPRG0; \
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stw r20,GPR20(r21); \
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mfspr r22,SPRG1; \
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stw r22,GPR21(r21); \
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mflr r20; \
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stw r20,_LINK(r21); \
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mfctr r22; \
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stw r22,_CTR(r21); \
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mfspr r20,XER; \
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stw r20,_XER(r21); \
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mfspr r20, DAR_DEAR; \
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stw r20,_DAR(r21); \
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mfspr r22,reg1; \
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mfspr r23,reg2; \
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stw r0,GPR0(r21); \
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stw r1,GPR1(r21); \
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stw r2,GPR2(r21); \
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stw r1,0(r21); \
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mr r1,r21; /* set new kernel sp */ \
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SAVE_4GPRS(3, r21);
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/*
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* Note: code which follows this uses cr0.eq (set if from kernel),
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* r21, r22 (SRR0), and r23 (SRR1).
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*/
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/*
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* Exception vectors.
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*
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* The data words for `hdlr' and `int_return' are initialized with
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* OFFSET values only; they must be relocated first before they can
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* be used!
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*/
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#define COPY_EE(d, s) rlwimi d,s,0,16,16
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#define NOCOPY(d, s)
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#ifdef CONFIG_E500
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#define EXC_XFER_TEMPLATE(n, label, hdlr, msr, copyee) \
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stw r22,_NIP(r21); \
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stw r23,_MSR(r21); \
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li r23,n; \
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stw r23,TRAP(r21); \
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li r20,msr; \
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copyee(r20,r23); \
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rlwimi r20,r23,0,25,25; \
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mtmsr r20; \
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bl 1f; \
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1: mflr r23; \
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addis r23,r23,(hdlr - 1b)@ha; \
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addi r23,r23,(hdlr - 1b)@l; \
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b transfer_to_handler
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#define STD_EXCEPTION(n, label, hdlr) \
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.align 4; \
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label: \
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EXCEPTION_PROLOG(SRR0, SRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(n, label, hdlr, MSR_KERNEL, NOCOPY) \
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#define CRIT_EXCEPTION(n, label, hdlr) \
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.align 4; \
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label: \
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EXCEPTION_PROLOG(CSRR0, CSRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(n, label, hdlr, \
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MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
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#define MCK_EXCEPTION(n, label, hdlr) \
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.align 4; \
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label: \
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EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(n, label, hdlr, \
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MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
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#else /* !E500 */
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#define EXC_XFER_TEMPLATE(label, hdlr, msr, copyee) \
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bl 1f; \
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1: mflr r20; \
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lwz r20,(.L_ ## label)-1b+8(r20); \
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mtlr r20; \
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li r20,msr; \
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copyee(r20,r23); \
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rlwimi r20,r23,0,25,25; \
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blrl; \
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.L_ ## label : \
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.long hdlr - _start + _START_OFFSET; \
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.long int_return - _start + _START_OFFSET; \
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.long transfer_to_handler - _start + _START_OFFSET
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#define STD_EXCEPTION(n, label, hdlr) \
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. = n; \
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label: \
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EXCEPTION_PROLOG(SRR0, SRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(label, hdlr, MSR_KERNEL, NOCOPY) \
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#define CRIT_EXCEPTION(n, label, hdlr) \
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. = n; \
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label: \
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EXCEPTION_PROLOG(CSRR0, CSRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(label, hdlr, \
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MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
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#define MCK_EXCEPTION(n, label, hdlr) \
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. = n; \
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label: \
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EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
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addi r3,r1,STACK_FRAME_OVERHEAD; \
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EXC_XFER_TEMPLATE(label, hdlr, \
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MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE), NOCOPY) \
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#endif /* !E500 */
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#endif /* __PPC_ASM_TMPL__ */
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