mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-14 23:26:16 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
113 lines
2.7 KiB
C
113 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2007 Freescale Semiconductor, Inc.
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*
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* Authors: Nick.Spence@freescale.com
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* Wilson.Lo@freescale.com
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* scottwood@freescale.com
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*/
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#include <common.h>
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#include <mpc83xx.h>
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#include <spd_sdram.h>
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#include <asm/bitops.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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DECLARE_GLOBAL_DATA_PTR;
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static void resume_from_sleep(void)
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{
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u32 magic = *(u32 *)0;
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typedef void (*func_t)(void);
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func_t resume = *(func_t *)4;
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if (magic == 0xf5153ae5)
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resume();
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gd->flags &= ~GD_FLG_SILENT;
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puts("\nResume from sleep failed: bad magic word\n");
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}
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/* Fixed sdram init -- doesn't use serial presence detect.
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*
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* This is useful for faster booting in configs where the RAM is unlikely
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* to be changed, or for things like NAND booting where space is tight.
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*/
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#ifndef CONFIG_SYS_RAMBOOT
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static long fixed_sdram(void)
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{
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volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
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u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
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u32 msize_log2 = __ilog2(msize);
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im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_SDRAM_BASE & 0xfffff000;
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im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
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im->sysconf.ddrcdr = CONFIG_SYS_DDRCDR_VALUE;
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/*
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* Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
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* or the DDR2 controller may fail to initialize correctly.
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*/
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__udelay(50000);
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im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
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im->ddr.cs_config[0] = CONFIG_SYS_DDR_CS0_CONFIG;
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/* Currently we use only one CS, so disable the other bank. */
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im->ddr.cs_config[1] = 0;
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im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_SDRAM_CLK_CNTL;
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im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
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im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
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im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
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im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
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if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
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im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG | SDRAM_CFG_BI;
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else
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im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
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im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
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im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
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im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
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im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
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sync();
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/* enable DDR controller */
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im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
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sync();
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return msize;
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}
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#else
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static long fixed_sdram(void)
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{
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return CONFIG_SYS_DDR_SIZE * 1024 * 1024;
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}
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#endif /* CONFIG_SYS_RAMBOOT */
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int dram_init(void)
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{
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volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR;
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u32 msize;
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if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
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return -ENXIO;
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/* DDR SDRAM */
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msize = fixed_sdram();
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if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
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resume_from_sleep();
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/* set total bus SDRAM size(bytes) -- DDR */
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gd->ram_size = msize;
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return 0;
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}
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