mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-12 14:16:17 +09:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
62 lines
1.7 KiB
C
62 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2006-2008
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* Texas Instruments, <www.ti.com>
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*
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* Author
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* Mansoor Ahamed <mansoor.ahamed@ti.com>
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*
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* Initial Code from:
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* Richard Woodruff <r-woodruff2@ti.com>
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*/
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#ifndef _MEM_H_
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#define _MEM_H_
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/*
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* GPMC settings -
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* Definitions is as per the following format
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* #define <PART>_GPMC_CONFIG<x> <value>
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* Where:
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* PART is the part name e.g. STNOR - Intel Strata Flash
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* x is GPMC config registers from 1 to 6 (there will be 6 macros)
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* Value is corresponding value
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*
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* For every valid PRCM configuration there should be only one definition of
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* the same. if values are independent of the board, this definition will be
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* present in this file if values are dependent on the board, then this should
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* go into corresponding mem-boardName.h file
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*
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* Currently valid part Names are (PART):
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* M_NAND - Micron NAND
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* STNOR - STMicrolelctronics M29W128GL
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*/
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#define GPMC_SIZE_256M 0x0
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#define GPMC_SIZE_128M 0x8
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#define GPMC_SIZE_64M 0xC
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#define GPMC_SIZE_32M 0xE
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#define GPMC_SIZE_16M 0xF
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#define M_NAND_GPMC_CONFIG1 0x00000800
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#define M_NAND_GPMC_CONFIG2 0x001e1e00
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#define M_NAND_GPMC_CONFIG3 0x001e1e00
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#define M_NAND_GPMC_CONFIG4 0x16051807
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#define M_NAND_GPMC_CONFIG5 0x00151e1e
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#define M_NAND_GPMC_CONFIG6 0x16000f80
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#define M_NAND_GPMC_CONFIG7 0x00000008
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#define STNOR_GPMC_CONFIG1 0x00001200
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#define STNOR_GPMC_CONFIG2 0x00101000
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#define STNOR_GPMC_CONFIG3 0x00030301
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#define STNOR_GPMC_CONFIG4 0x10041004
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#define STNOR_GPMC_CONFIG5 0x000C1010
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#define STNOR_GPMC_CONFIG6 0x08070280
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#define STNOR_GPMC_CONFIG7 0x00000F48
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/* max number of GPMC Chip Selects */
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#define GPMC_MAX_CS 8
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/* max number of GPMC regs */
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#define GPMC_MAX_REG 7
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#endif /* endif _MEM_H_ */
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