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https://github.com/brain-hackers/u-boot-brain
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41575d8e4c
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
113 lines
2.6 KiB
C
113 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 Google, LLC
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <irq.h>
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#include <log.h>
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#include <acpi/acpi_device.h>
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#include <asm/io.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/x86-irq.h>
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/**
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* struct acpi_gpe_priv - private driver information
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*
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* @acpi_base: Base I/O address of ACPI registers
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*/
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struct acpi_gpe_priv {
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ulong acpi_base;
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};
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#define GPE0_STS(x) (0x20 + ((x) * 4))
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static int acpi_gpe_read_and_clear(struct irq *irq)
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{
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struct acpi_gpe_priv *priv = dev_get_priv(irq->dev);
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u32 mask, sts;
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ulong start;
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int ret = 0;
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int bank;
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bank = irq->id / 32;
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mask = 1 << (irq->id % 32);
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/* Wait up to 1ms for GPE status to clear */
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start = get_timer(0);
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do {
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if (get_timer(start) > 1)
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return ret;
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sts = inl(priv->acpi_base + GPE0_STS(bank));
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if (sts & mask) {
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outl(mask, priv->acpi_base + GPE0_STS(bank));
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ret = 1;
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}
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} while (sts & mask);
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return ret;
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}
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static int acpi_gpe_ofdata_to_platdata(struct udevice *dev)
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{
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struct acpi_gpe_priv *priv = dev_get_priv(dev);
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priv->acpi_base = dev_read_addr(dev);
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if (!priv->acpi_base || priv->acpi_base == FDT_ADDR_T_NONE)
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return log_msg_ret("acpi_base", -EINVAL);
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return 0;
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}
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static int acpi_gpe_of_xlate(struct irq *irq, struct ofnode_phandle_args *args)
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{
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irq->id = args->args[0];
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irq->flags = args->args[1];
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return 0;
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}
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#if CONFIG_IS_ENABLED(ACPIGEN)
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static int acpi_gpe_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq)
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{
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memset(acpi_irq, '\0', sizeof(*acpi_irq));
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acpi_irq->pin = irq->id;
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acpi_irq->mode = irq->flags & IRQ_TYPE_EDGE_BOTH ?
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ACPI_IRQ_EDGE_TRIGGERED : ACPI_IRQ_LEVEL_TRIGGERED;
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acpi_irq->polarity = irq->flags &
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(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW) ?
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ACPI_IRQ_ACTIVE_LOW : ACPI_IRQ_ACTIVE_HIGH;
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acpi_irq->shared = irq->flags & X86_IRQ_TYPE_SHARED ?
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ACPI_IRQ_SHARED : ACPI_IRQ_EXCLUSIVE;
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acpi_irq->wake = irq->flags & X86_IRQ_TYPE_WAKE ? ACPI_IRQ_WAKE :
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ACPI_IRQ_NO_WAKE;
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return 0;
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}
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#endif
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static const struct irq_ops acpi_gpe_ops = {
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.read_and_clear = acpi_gpe_read_and_clear,
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.of_xlate = acpi_gpe_of_xlate,
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#if CONFIG_IS_ENABLED(ACPIGEN)
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.get_acpi = acpi_gpe_get_acpi,
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#endif
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};
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static const struct udevice_id acpi_gpe_ids[] = {
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{ .compatible = "intel,acpi-gpe", .data = X86_IRQT_ACPI_GPE },
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{ }
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};
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U_BOOT_DRIVER(acpi_gpe_drv) = {
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.name = "acpi_gpe",
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.id = UCLASS_IRQ,
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.of_match = acpi_gpe_ids,
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.ops = &acpi_gpe_ops,
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.ofdata_to_platdata = acpi_gpe_ofdata_to_platdata,
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.priv_auto = sizeof(struct acpi_gpe_priv),
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};
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