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https://github.com/brain-hackers/u-boot-brain
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1d7993d1d0
This patch brings the files from Linux kernel (linux-stable/linux-5.1.y SHA1: 5752b50477da)to provide clocks support as it is used on the Linux kernel with Common Clock Framework [CCF] setup. The directory structure has been preserved. The ported code only supports reading information from PLL, MUX, Divider, etc and enabling/disabling the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic to the alias numbering as the information about the clock is read from the device tree. One needs to pay attention to the comments indicating necessary for U-Boot's driver model changes. If needed, the code can be extended to support the "set" part of the clock management. Signed-off-by: Lukasz Majewski <lukma@denx.de>
70 lines
1.9 KiB
C
70 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2019 DENX Software Engineering
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*/
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#ifndef __MACH_IMX_CLK_H
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#define __MACH_IMX_CLK_H
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#include <linux/clk-provider.h>
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enum imx_pllv3_type {
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IMX_PLLV3_GENERIC,
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IMX_PLLV3_SYS,
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IMX_PLLV3_USB,
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IMX_PLLV3_USB_VF610,
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IMX_PLLV3_AV,
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IMX_PLLV3_ENET,
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IMX_PLLV3_ENET_IMX7,
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IMX_PLLV3_SYS_VF610,
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IMX_PLLV3_DDR_IMX7,
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};
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struct clk *clk_register_gate2(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 bit_idx, u8 cgr_val,
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u8 clk_gate_flags);
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struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
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const char *parent_name, void __iomem *base,
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u32 div_mask);
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static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
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void __iomem *reg, u8 shift)
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{
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return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
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shift, 0x3, 0);
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}
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static inline struct clk *imx_clk_fixed_factor(const char *name,
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const char *parent, unsigned int mult, unsigned int div)
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{
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return clk_register_fixed_factor(NULL, name, parent,
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CLK_SET_RATE_PARENT, mult, div);
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}
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static inline struct clk *imx_clk_divider(const char *name, const char *parent,
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void __iomem *reg, u8 shift, u8 width)
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{
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return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
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reg, shift, width, 0);
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}
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struct clk *imx_clk_pfd(const char *name, const char *parent_name,
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void __iomem *reg, u8 idx);
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struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char * const *parents,
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int num_parents, void (*fixup)(u32 *val));
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static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
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u8 shift, u8 width, const char * const *parents,
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int num_parents)
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{
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return clk_register_mux(NULL, name, parents, num_parents,
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CLK_SET_RATE_NO_REPARENT, reg, shift,
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width, 0);
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}
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#endif /* __MACH_IMX_CLK_H */
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