Masahiro Yamada 4f19f61184 ARM: uniphier: merge DDR PHY init code for 3 SoCs ... Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>		2016-02-29 03:50:16 +09:00
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arc	arc: cache - utilize IO coherency (AKA IOC) engine	2016-02-20 11:20:05 +03:00
arm	ARM: uniphier: merge DDR PHY init code for 3 SoCs	2016-02-29 03:50:16 +09:00
avr32	avr32: Use the generic bitops headers	2015-11-05 10:52:31 -05:00
blackfin	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
m68k	m68k: M54418TWR: drop board/freescale/m54418twr/config.mk	2016-01-20 10:19:34 -05:00
microblaze	microblaze: Add missing chosen node	2016-02-24 18:44:15 -05:00
mips	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
nds32	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
nios2	nios2: set up the debug UART early	2016-02-06 15:14:25 +08:00
openrisc	openrisc: Fix build errors	2016-01-25 10:40:01 -05:00
powerpc	fm: fdt: Move fman ucode fixup to driver code	2016-02-24 08:51:13 -08:00
sandbox	dm: video: test: Add tests for the video uclass	2016-01-20 19:10:16 -07:00
sh	Add more SPDX-License-Identifier tags	2016-01-19 08:31:21 -05:00
sparc	Use correct spelling of "U-Boot"	2016-02-06 12:00:59 +01:00
x86	x86: Add Intel Cougar Canyon 2 board	2016-02-21 13:42:52 +08:00
.gitignore	.gitignore: drop include/asm/proc from ignore pattern	2014-06-19 11:18:54 -04:00
Kconfig	MIPS: add initial infrastructure for device-tree files	2016-01-16 21:06:45 +01:00