mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
28fff3fa1c
The u-boot-spl.bin pad with ddr firmware conflicts with the CONFIG_MALLOC_F_ADDR area, the ddr firmware will be overwritten by malloc in SPL stage and cause ddr initialization not able to finish. So update the related addresses to fix the issue. Reported-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Fabio Estevam <festevam@gmail.com>
87 lines
2.1 KiB
Plaintext
87 lines
2.1 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_IMX8M=y
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CONFIG_SYS_TEXT_BASE=0x40200000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x8000
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CONFIG_SPL_SYS_MALLOC_SIMPLE=y
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CONFIG_ENV_SIZE=0x1000
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CONFIG_ENV_OFFSET=0x400000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_TARGET_IMX8MP_EVK=y
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_SPL=y
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CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000
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CONFIG_SPL_TEXT_BASE=0x920000
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CONFIG_FIT=y
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CONFIG_FIT_EXTERNAL_OFFSET=0x3000
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
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CONFIG_OF_SYSTEM_SETUP=y
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CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg"
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CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb"
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_BOARD_EARLY_INIT_F=y
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CONFIG_SPL_BOARD_INIT=y
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CONFIG_SPL_BOOTROM_SUPPORT=y
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CONFIG_SPL_SEPARATE_BSS=y
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CONFIG_SPL_I2C_SUPPORT=y
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CONFIG_SPL_POWER_SUPPORT=y
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CONFIG_SPL_WATCHDOG_SUPPORT=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="u-boot=> "
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# CONFIG_CMD_EXPORTENV is not set
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# CONFIG_CMD_IMPORTENV is not set
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# CONFIG_CMD_CRC32 is not set
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CONFIG_CMD_CLK=y
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CONFIG_CMD_FUSE=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_EXT4=y
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CONFIG_CMD_EXT4_WRITE=y
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CONFIG_CMD_FAT=y
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CONFIG_OF_CONTROL=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_SPL_DM=y
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CONFIG_CLK_COMPOSITE_CCF=y
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CONFIG_CLK_IMX8MP=y
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CONFIG_MXC_GPIO=y
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CONFIG_DM_PCA953X=y
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CONFIG_DM_I2C=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_DM_MMC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_MMC_IO_VOLTAGE=y
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CONFIG_FSL_ESDHC_IMX=y
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CONFIG_PHYLIB=y
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CONFIG_DM_ETH=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_IMX8M=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_MXC_UART=y
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CONFIG_SYSRESET=y
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CONFIG_SPL_SYSRESET=y
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CONFIG_SYSRESET_PSCI=y
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CONFIG_SYSRESET_WATCHDOG=y
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CONFIG_IMX_WATCHDOG=y
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