u-boot-brain/arch/arm/include/asm/imx-common
Peng Fan ab87fc6bbd imx: dma: correct MXS_DMA_ALIGNMENT
We should not hardcode MXS_DMA_ALIGNMENT to 32, since we can not guarantee
that socs' cache line size is 32 bytes.
If on chips whose cache line size is 64 bytes, error occurs:
"
NAND:  ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xbdf1f4a0
ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0
"
Align MXS_DMA_ALIGNMENT with ARCH_DMA_MINALIGN whose value is same to
CONFIG_SYS_CACHELINE_SIZE if CONFIG_SYS_CACHELINE_SIZE defined.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-05-26 14:14:49 +02:00
..
boot_mode.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
dma.h imx: dma: correct MXS_DMA_ALIGNMENT 2015-05-26 14:14:49 +02:00
gpio.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
imximage.cfg Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
iomux-v3.h imx: mx6 sabreauto: Add board support for USB EHCI 2014-11-03 11:21:49 +01:00
mx5_video.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
mxc_i2c.h i2c: mxc: refactor i2c driver and support dm 2015-05-14 18:49:36 -06:00
regs-apbh.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
regs-bch.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
regs-common.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
regs-gpmi.h Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
regs-usbphy.h usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's 2015-04-23 14:56:09 -04:00
sata.h nitrogen6x: Move setup_sata to common part 2013-12-17 18:12:14 +01:00
spi.h ARM: i.MX: provide declaration for board_spi_cs_gpio 2014-10-21 10:47:14 +02:00
video.h video, ipu: make ldb clock frequency overwritable through board code 2015-04-20 09:36:59 +02:00