u-boot-brain/arch/arm/include
Tang Yuantian 4de6ce1594 armv8: fsl-lsch2: enable snoopable sata read and write
By default the SATA IP on the ls1043a/ls1046a SoCs does not
generating coherent/snoopable transactions.  This patch enable
it in the SCFG_SNPCNFGCR register along with sata axicc register.
In addition, the dma-coherent property must be set on the SATA
controller nodes.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
[York Sun: Reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2016-10-06 09:52:59 -07:00
..
asm armv8: fsl-lsch2: enable snoopable sata read and write 2016-10-06 09:52:59 -07:00
debug arm: debug: replace license blocks with SPDX 2014-10-26 22:22:09 +01:00