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https://github.com/brain-hackers/u-boot-brain
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fe3334d0a3
Import misc remaining header files from 2013 U-Boot. These will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
114 lines
2.8 KiB
C
114 lines
2.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*
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* This file provides support for the processor local scratch memory.
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* Scratch memory is byte addressable - all addresses are byte addresses.
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*/
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#ifndef __CVMX_SCRATCH_H__
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#define __CVMX_SCRATCH_H__
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/* Note: This define must be a long, not a long long in order to compile
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without warnings for both 32bit and 64bit. */
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#define CVMX_SCRATCH_BASE (-32768l) /* 0xffffffffffff8000 */
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/* Scratch line for LMTST/LMTDMA on Octeon3 models */
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#ifdef CVMX_CAVIUM_OCTEON3
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#define CVMX_PKO_LMTLINE 2ull
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#endif
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/**
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* Reads an 8 bit value from the processor local scratchpad memory.
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*
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* @param address byte address to read from
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*
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* @return value read
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*/
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static inline u8 cvmx_scratch_read8(u64 address)
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{
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return *CASTPTR(volatile u8, CVMX_SCRATCH_BASE + address);
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}
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/**
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* Reads a 16 bit value from the processor local scratchpad memory.
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*
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* @param address byte address to read from
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*
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* @return value read
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*/
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static inline u16 cvmx_scratch_read16(u64 address)
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{
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return *CASTPTR(volatile u16, CVMX_SCRATCH_BASE + address);
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}
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/**
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* Reads a 32 bit value from the processor local scratchpad memory.
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*
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* @param address byte address to read from
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*
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* @return value read
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*/
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static inline u32 cvmx_scratch_read32(u64 address)
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{
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return *CASTPTR(volatile u32, CVMX_SCRATCH_BASE + address);
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}
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/**
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* Reads a 64 bit value from the processor local scratchpad memory.
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*
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* @param address byte address to read from
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*
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* @return value read
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*/
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static inline u64 cvmx_scratch_read64(u64 address)
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{
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return *CASTPTR(volatile u64, CVMX_SCRATCH_BASE + address);
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}
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/**
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* Writes an 8 bit value to the processor local scratchpad memory.
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*
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* @param address byte address to write to
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* @param value value to write
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*/
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static inline void cvmx_scratch_write8(u64 address, u64 value)
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{
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*CASTPTR(volatile u8, CVMX_SCRATCH_BASE + address) = (u8)value;
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}
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/**
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* Writes a 32 bit value to the processor local scratchpad memory.
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*
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* @param address byte address to write to
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* @param value value to write
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*/
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static inline void cvmx_scratch_write16(u64 address, u64 value)
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{
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*CASTPTR(volatile u16, CVMX_SCRATCH_BASE + address) = (u16)value;
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}
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/**
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* Writes a 16 bit value to the processor local scratchpad memory.
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*
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* @param address byte address to write to
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* @param value value to write
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*/
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static inline void cvmx_scratch_write32(u64 address, u64 value)
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{
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*CASTPTR(volatile u32, CVMX_SCRATCH_BASE + address) = (u32)value;
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}
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/**
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* Writes a 64 bit value to the processor local scratchpad memory.
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*
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* @param address byte address to write to
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* @param value value to write
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*/
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static inline void cvmx_scratch_write64(u64 address, u64 value)
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{
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*CASTPTR(volatile u64, CVMX_SCRATCH_BASE + address) = value;
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}
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#endif /* __CVMX_SCRATCH_H__ */
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