442 lines
10 KiB
C
442 lines
10 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2020 Stefan Roese <sr@denx.de>
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*/
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#ifndef __CVMX_REGS_H__
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#define __CVMX_REGS_H__
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <mach/cvmx-address.h>
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/* General defines */
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#define CVMX_MAX_CORES 48
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/* Maximum # of bits to define core in node */
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#define CVMX_NODE_NO_SHIFT 7
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#define CVMX_NODE_BITS 2 /* Number of bits to define a node */
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#define CVMX_MAX_NODES (1 << CVMX_NODE_BITS)
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#define CVMX_NODE_MASK (CVMX_MAX_NODES - 1)
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#define CVMX_NODE_IO_SHIFT 36
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#define CVMX_NODE_MEM_SHIFT 40
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#define CVMX_NODE_IO_MASK ((u64)CVMX_NODE_MASK << CVMX_NODE_IO_SHIFT)
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#define CVMX_MIPS_MAX_CORE_BITS 10 /* Maximum # of bits to define cores */
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#define CVMX_MIPS_MAX_CORES (1 << CVMX_MIPS_MAX_CORE_BITS)
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#define MAX_CORE_TADS 8
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#define CASTPTR(type, v) ((type *)(long)(v))
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#define CAST64(v) ((long long)(long)(v))
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/* Regs */
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#define CVMX_CIU3_NMI 0x0001010000000160ULL
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#define CVMX_MIO_BOOT_LOC_CFGX(x) (0x0001180000000080ULL + ((x) & 1) * 8)
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#define MIO_BOOT_LOC_CFG_BASE GENMASK_ULL(27, 3)
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#define MIO_BOOT_LOC_CFG_EN BIT_ULL(31)
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#define CVMX_MIO_BOOT_LOC_ADR 0x0001180000000090ULL
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#define MIO_BOOT_LOC_ADR_ADR GENMASK_ULL(7, 3)
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#define CVMX_MIO_BOOT_LOC_DAT 0x0001180000000098ULL
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#define CVMX_MIO_FUS_DAT2 0x0001180000001410ULL
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#define MIO_FUS_DAT2_NOCRYPTO BIT_ULL(26)
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#define MIO_FUS_DAT2_NOMUL BIT_ULL(27)
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#define MIO_FUS_DAT2_DORM_CRYPTO BIT_ULL(34)
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#define CVMX_MIO_FUS_RCMD 0x0001180000001500ULL
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#define MIO_FUS_RCMD_ADDR GENMASK_ULL(7, 0)
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#define MIO_FUS_RCMD_PEND BIT_ULL(12)
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#define MIO_FUS_RCMD_DAT GENMASK_ULL(23, 16)
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#define CVMX_RNM_CTL_STATUS 0x0001180040000000ULL
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#define RNM_CTL_STATUS_EER_VAL BIT_ULL(9)
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#define CVMX_IOBDMA_ORDERED_IO_ADDR 0xffffffffffffa200ull
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/* turn the variable name into a string */
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#define CVMX_TMP_STR(x) CVMX_TMP_STR2(x)
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#define CVMX_TMP_STR2(x) #x
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#define CVMX_RDHWR(result, regstr) \
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asm volatile("rdhwr %[rt],$" CVMX_TMP_STR(regstr) : [rt] "=d"(result))
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#define CVMX_RDHWRNV(result, regstr) \
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asm("rdhwr %[rt],$" CVMX_TMP_STR(regstr) : [rt] "=d"(result))
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#define CVMX_POP(result, input) \
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asm("pop %[rd],%[rs]" : [rd] "=d"(result) : [rs] "d"(input))
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#define CVMX_SYNC asm volatile("sync\n" : : : "memory")
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#define CVMX_SYNCW asm volatile("syncw\nsyncw\n" : : : "memory")
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#define CVMX_SYNCS asm volatile("syncs\n" : : : "memory")
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#define CVMX_SYNCWS asm volatile("syncws\n" : : : "memory")
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#define CVMX_CACHE_LINE_SIZE 128 // In bytes
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#define CVMX_CACHE_LINE_MASK (CVMX_CACHE_LINE_SIZE - 1) // In bytes
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#define CVMX_CACHE_LINE_ALIGNED __aligned(CVMX_CACHE_LINE_SIZE)
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#define CVMX_SYNCIOBDMA asm volatile("synciobdma" : : : "memory")
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#define CVMX_MF_CHORD(dest) CVMX_RDHWR(dest, 30)
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/*
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* The macros cvmx_likely and cvmx_unlikely use the
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* __builtin_expect GCC operation to control branch
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* probabilities for a conditional. For example, an "if"
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* statement in the code that will almost always be
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* executed should be written as "if (cvmx_likely(...))".
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* If the "else" section of an if statement is more
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* probable, use "if (cvmx_unlikey(...))".
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*/
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#define cvmx_likely(x) __builtin_expect(!!(x), 1)
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#define cvmx_unlikely(x) __builtin_expect(!!(x), 0)
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#define CVMX_WAIT_FOR_FIELD64(address, type, field, op, value, to_us) \
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({ \
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int result; \
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do { \
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u64 done = get_timer(0); \
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type c; \
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while (1) { \
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c.u64 = csr_rd(address); \
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if ((c.s.field)op(value)) { \
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result = 0; \
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break; \
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} else if (get_timer(done) > ((to_us) / 1000)) { \
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result = -1; \
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break; \
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} else \
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udelay(100); \
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} \
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} while (0); \
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result; \
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})
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#define CVMX_WAIT_FOR_FIELD64_NODE(node, address, type, field, op, value, to_us) \
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({ \
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int result; \
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do { \
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u64 done = get_timer(0); \
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type c; \
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while (1) { \
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c.u64 = csr_rd(address); \
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if ((c.s.field)op(value)) { \
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result = 0; \
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break; \
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} else if (get_timer(done) > ((to_us) / 1000)) { \
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result = -1; \
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break; \
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} else \
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udelay(100); \
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} \
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} while (0); \
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result; \
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})
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/* ToDo: Currently only node = 0 supported */
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#define cvmx_get_node_num() 0
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static inline u64 csr_rd_node(int node, u64 addr)
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{
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void __iomem *base;
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base = ioremap_nocache(addr, 0x100);
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return ioread64(base);
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}
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static inline u32 csr_rd32_node(int node, u64 addr)
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{
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void __iomem *base;
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base = ioremap_nocache(addr, 0x100);
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return ioread32(base);
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}
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static inline u64 csr_rd(u64 addr)
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{
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return csr_rd_node(0, addr);
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}
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static inline u32 csr_rd32(u64 addr)
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{
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return csr_rd32_node(0, addr);
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}
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static inline void csr_wr_node(int node, u64 addr, u64 val)
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{
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void __iomem *base;
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base = ioremap_nocache(addr, 0x100);
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iowrite64(val, base);
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}
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static inline void csr_wr32_node(int node, u64 addr, u32 val)
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{
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void __iomem *base;
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base = ioremap_nocache(addr, 0x100);
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iowrite32(val, base);
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}
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static inline void csr_wr(u64 addr, u64 val)
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{
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csr_wr_node(0, addr, val);
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}
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static inline void csr_wr32(u64 addr, u32 val)
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{
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csr_wr32_node(0, addr, val);
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}
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/*
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* We need to use the volatile access here, otherwise the IO accessor
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* functions might swap the bytes
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*/
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static inline u64 cvmx_read64_uint64(u64 addr)
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{
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return *(volatile u64 *)addr;
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}
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static inline s64 cvmx_read64_int64(u64 addr)
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{
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return *(volatile s64 *)addr;
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}
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static inline void cvmx_write64_uint64(u64 addr, u64 val)
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{
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*(volatile u64 *)addr = val;
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}
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static inline void cvmx_write64_int64(u64 addr, s64 val)
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{
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*(volatile s64 *)addr = val;
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}
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static inline u32 cvmx_read64_uint32(u64 addr)
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{
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return *(volatile u32 *)addr;
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}
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static inline s32 cvmx_read64_int32(u64 addr)
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{
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return *(volatile s32 *)addr;
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}
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static inline void cvmx_write64_uint32(u64 addr, u32 val)
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{
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*(volatile u32 *)addr = val;
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}
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static inline void cvmx_write64_int32(u64 addr, s32 val)
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{
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*(volatile s32 *)addr = val;
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}
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static inline void cvmx_write64_int16(u64 addr, s16 val)
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{
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*(volatile s16 *)addr = val;
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}
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static inline void cvmx_write64_uint16(u64 addr, u16 val)
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{
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*(volatile u16 *)addr = val;
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}
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static inline void cvmx_write64_int8(u64 addr, int8_t val)
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{
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*(volatile int8_t *)addr = val;
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}
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static inline void cvmx_write64_uint8(u64 addr, u8 val)
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{
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*(volatile u8 *)addr = val;
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}
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static inline s16 cvmx_read64_int16(u64 addr)
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{
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return *(volatile s16 *)addr;
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}
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static inline u16 cvmx_read64_uint16(u64 addr)
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{
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return *(volatile u16 *)addr;
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}
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static inline int8_t cvmx_read64_int8(u64 addr)
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{
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return *(volatile int8_t *)addr;
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}
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static inline u8 cvmx_read64_uint8(u64 addr)
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{
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return *(volatile u8 *)addr;
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}
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static inline void cvmx_send_single(u64 data)
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{
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cvmx_write64_uint64(CVMX_IOBDMA_ORDERED_IO_ADDR, data);
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}
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/**
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* Perform a 64-bit write to an IO address
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*
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* @param io_addr I/O address to write to
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* @param val 64-bit value to write
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*/
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static inline void cvmx_write_io(u64 io_addr, u64 val)
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{
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cvmx_write64_uint64(io_addr, val);
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}
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/**
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* Builds a memory address for I/O based on the Major and Sub DID.
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*
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* @param major_did 5 bit major did
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* @param sub_did 3 bit sub did
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* @return I/O base address
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*/
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static inline u64 cvmx_build_io_address(u64 major_did, u64 sub_did)
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{
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return ((0x1ull << 48) | (major_did << 43) | (sub_did << 40));
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}
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/**
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* Builds a bit mask given the required size in bits.
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*
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* @param bits Number of bits in the mask
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* @return The mask
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*/
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static inline u64 cvmx_build_mask(u64 bits)
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{
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if (bits == 64)
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return -1;
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return ~((~0x0ull) << bits);
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}
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/**
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* Extract bits out of a number
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*
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* @param input Number to extract from
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* @param lsb Starting bit, least significant (0-63)
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* @param width Width in bits (1-64)
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*
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* @return Extracted number
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*/
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static inline u64 cvmx_bit_extract(u64 input, int lsb, int width)
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{
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u64 result = input >> lsb;
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result &= cvmx_build_mask(width);
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return result;
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}
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/**
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* Perform mask and shift to place the supplied value into
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* the supplied bit rage.
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*
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* Example: cvmx_build_bits(39,24,value)
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* <pre>
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* 6 5 4 3 3 2 1
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* 3 5 7 9 1 3 5 7 0
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* +-------+-------+-------+-------+-------+-------+-------+------+
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* 000000000000000000000000___________value000000000000000000000000
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* </pre>
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*
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* @param high_bit Highest bit value can occupy (inclusive) 0-63
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* @param low_bit Lowest bit value can occupy inclusive 0-high_bit
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* @param value Value to use
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* @return Value masked and shifted
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*/
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static inline u64 cvmx_build_bits(u64 high_bit, u64 low_bit, u64 value)
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{
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return ((value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit);
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}
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static inline u64 cvmx_mask_to_localaddr(u64 addr)
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{
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return (addr & 0xffffffffff);
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}
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static inline u64 cvmx_addr_on_node(u64 node, u64 addr)
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{
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return (node << 40) | cvmx_mask_to_localaddr(addr);
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}
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static inline void *cvmx_phys_to_ptr(u64 addr)
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{
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return (void *)CKSEG0ADDR(addr);
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}
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static inline u64 cvmx_ptr_to_phys(void *ptr)
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{
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return virt_to_phys(ptr);
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}
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/**
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* Number of the Core on which the program is currently running.
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*
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* @return core number
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*/
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static inline unsigned int cvmx_get_core_num(void)
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{
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unsigned int core_num;
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CVMX_RDHWRNV(core_num, 0);
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return core_num;
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}
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/**
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* Node-local number of the core on which the program is currently running.
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*
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* @return core number on local node
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*/
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static inline unsigned int cvmx_get_local_core_num(void)
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{
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unsigned int core_num, core_mask;
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CVMX_RDHWRNV(core_num, 0);
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/* note that MAX_CORES may not be power of 2 */
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core_mask = (1 << CVMX_NODE_NO_SHIFT) - 1;
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return core_num & core_mask;
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}
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/**
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* Returns the number of bits set in the provided value.
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* Simple wrapper for POP instruction.
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*
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* @param val 32 bit value to count set bits in
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*
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* @return Number of bits set
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*/
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static inline u32 cvmx_pop(u32 val)
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{
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u32 pop;
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CVMX_POP(pop, val);
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return pop;
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}
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#define cvmx_read_csr_node(node, addr) csr_rd(addr)
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#define cvmx_write_csr_node(node, addr, val) csr_wr(addr, val)
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#define cvmx_printf printf
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#define cvmx_vprintf vprintf
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#if defined(DEBUG)
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void cvmx_warn(const char *format, ...) __printf(1, 2);
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#else
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void cvmx_warn(const char *format, ...);
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#endif
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#define cvmx_warn_if(expression, format, ...) \
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if (expression) \
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cvmx_warn(format, ##__VA_ARGS__)
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#endif /* __CVMX_REGS_H__ */
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