mirror of
https://github.com/brain-hackers/u-boot-brain
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fe3334d0a3
Import misc remaining header files from 2013 U-Boot. These will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
88 lines
2.1 KiB
C
88 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*
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* Definitions for enumerations used with Octeon CSRs.
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*/
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#ifndef __CVMX_CSR_ENUMS_H__
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#define __CVMX_CSR_ENUMS_H__
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typedef enum {
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CVMX_IPD_OPC_MODE_STT = 0LL,
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CVMX_IPD_OPC_MODE_STF = 1LL,
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CVMX_IPD_OPC_MODE_STF1_STT = 2LL,
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CVMX_IPD_OPC_MODE_STF2_STT = 3LL
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} cvmx_ipd_mode_t;
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/**
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* Enumeration representing the amount of packet processing
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* and validation performed by the input hardware.
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*/
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typedef enum {
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CVMX_PIP_PORT_CFG_MODE_NONE = 0ull,
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CVMX_PIP_PORT_CFG_MODE_SKIPL2 = 1ull,
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CVMX_PIP_PORT_CFG_MODE_SKIPIP = 2ull
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} cvmx_pip_port_parse_mode_t;
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/**
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* This enumeration controls how a QoS watcher matches a packet.
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*
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* @deprecated This enumeration was used with cvmx_pip_config_watcher which has
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* been deprecated.
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*/
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typedef enum {
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CVMX_PIP_QOS_WATCH_DISABLE = 0ull,
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CVMX_PIP_QOS_WATCH_PROTNH = 1ull,
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CVMX_PIP_QOS_WATCH_TCP = 2ull,
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CVMX_PIP_QOS_WATCH_UDP = 3ull
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} cvmx_pip_qos_watch_types;
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/**
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* This enumeration is used in PIP tag config to control how
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* POW tags are generated by the hardware.
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*/
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typedef enum {
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CVMX_PIP_TAG_MODE_TUPLE = 0ull,
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CVMX_PIP_TAG_MODE_MASK = 1ull,
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CVMX_PIP_TAG_MODE_IP_OR_MASK = 2ull,
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CVMX_PIP_TAG_MODE_TUPLE_XOR_MASK = 3ull
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} cvmx_pip_tag_mode_t;
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/**
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* Tag type definitions
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*/
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typedef enum {
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CVMX_POW_TAG_TYPE_ORDERED = 0L,
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CVMX_POW_TAG_TYPE_ATOMIC = 1L,
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CVMX_POW_TAG_TYPE_NULL = 2L,
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CVMX_POW_TAG_TYPE_NULL_NULL = 3L
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} cvmx_pow_tag_type_t;
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/**
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* LCR bits 0 and 1 control the number of bits per character. See the following table for encodings:
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*
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* - 00 = 5 bits (bits 0-4 sent)
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* - 01 = 6 bits (bits 0-5 sent)
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* - 10 = 7 bits (bits 0-6 sent)
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* - 11 = 8 bits (all bits sent)
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*/
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typedef enum {
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CVMX_UART_BITS5 = 0,
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CVMX_UART_BITS6 = 1,
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CVMX_UART_BITS7 = 2,
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CVMX_UART_BITS8 = 3
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} cvmx_uart_bits_t;
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typedef enum {
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CVMX_UART_IID_NONE = 1,
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CVMX_UART_IID_RX_ERROR = 6,
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CVMX_UART_IID_RX_DATA = 4,
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CVMX_UART_IID_RX_TIMEOUT = 12,
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CVMX_UART_IID_TX_EMPTY = 2,
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CVMX_UART_IID_MODEM = 0,
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CVMX_UART_IID_BUSY = 7
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} cvmx_uart_iid_t;
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#endif /* __CVMX_CSR_ENUMS_H__ */
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