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https://github.com/brain-hackers/u-boot-brain
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85b8c5c4bf
Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
237 lines
7.3 KiB
C
237 lines
7.3 KiB
C
/*
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* CPUAT91 by (C) Copyright 2006-2010 Eric Benard
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* eric@eukrea.com
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*
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* Configuration settings for the CPUAT91 board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _CONFIG_CPUAT91_H
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#define _CONFIG_CPUAT91_H
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#include <asm/sizes.h>
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#ifdef CONFIG_RAMBOOT
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0x21F00000
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#else
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#define CONFIG_BOOTDELAY 1
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#define CONFIG_SYS_TEXT_BASE 0
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#endif
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#define AT91C_XTAL_CLOCK 18432000
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#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
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#define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39)
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#define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3)
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#define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2)
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#define CONFIG_ARM920T
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#define CONFIG_AT91RM9200
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#define CONFIG_CPUAT91
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#define USE_920T_MMU
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#include <asm/hardware.h> /* needed for port definitions */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_BOARD_EARLY_INIT_F
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_USE_MAIN_OSCILLATOR
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/* flash */
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#define CONFIG_SYS_MC_PUIA_VAL 0x00000000
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#define CONFIG_SYS_MC_PUP_VAL 0x00000000
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#define CONFIG_SYS_MC_PUER_VAL 0x00000000
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#define CONFIG_SYS_MC_ASR_VAL 0x00000000
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#define CONFIG_SYS_MC_AASR_VAL 0x00000000
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#define CONFIG_SYS_EBI_CFGR_VAL 0x00000000
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#define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */
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/* clocks */
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#define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */
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#define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz for USB */
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#define CONFIG_SYS_MCKR_VAL 0x00000202 /* PCK/3 = MCK Master Clock */
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/* sdram */
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#define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as D16/D31 */
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#define CONFIG_SYS_PIOC_BSR_VAL 0x00000000
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#define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000
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#define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=SDRAM */
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#define CONFIG_SYS_SDRC_CR_VAL 0x2188C155 /* set up the SDRAM */
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#define CONFIG_SYS_SDRAM 0x20000000 /* address of the SDRAM */
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#define CONFIG_SYS_SDRAM1 0x20000080 /* address of the SDRAM */
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#define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to SDRAM */
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#define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */
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#define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */
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#define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
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#define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */
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#define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#define CONFIG_ATMEL_USART
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#define CONFIG_USART_BASE ATMEL_BASE_DBGU
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#define CONFIG_USART_ID 0/* ignored in arm */
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#undef CONFIG_HARD_I2C
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#define AT91_PIN_SDA (1<<25)
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#define AT91_PIN_SCL (1<<26)
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#define CONFIG_SYS_I2C_INIT_BOARD
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#define CONFIG_SYS_I2C_SPEED 50000
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#define CONFIG_SYS_I2C_SLAVE 0
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#define I2C_INIT i2c_init_board();
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#define I2C_ACTIVE writel(AT91_PMX_AA_TWD, &pio->pioa.mddr);
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#define I2C_TRISTATE writel(AT91_PMX_AA_TWD, &pio->pioa.mder);
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#define I2C_READ ((readl(&pio->pioa.pdsr) & AT91_PMX_AA_TWD) != 0)
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#define I2C_SDA(bit) \
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if (bit) \
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writel(AT91_PMX_AA_TWD, &pio->pioa.sodr); \
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else \
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writel(AT91_PMX_AA_TWD, &pio->pioa.codr);
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#define I2C_SCL(bit) \
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if (bit) \
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writel(AT91_PMX_AA_TWCK, &pio->pioa.sodr); \
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else \
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writel(AT91_PMX_AA_TWCK, &pio->pioa.codr);
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#define I2C_DELAY udelay(2500000/CONFIG_SYS_I2C_SPEED)
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
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#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 1
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_CACHE
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#undef CONFIG_CMD_USB
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_IMI
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#undef CONFIG_CMD_LOADS
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#undef CONFIG_CMD_NFS
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#undef CONFIG_CMD_DHCP
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#ifdef CONFIG_SYS_I2C_SOFT
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#define CONFIG_CMD_EEPROM
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#define CONFIG_CMD_I2C
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#endif
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_SDRAM_BASE 0x20000000
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#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024)
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END \
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(CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - 512 * 1024)
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#define CONFIG_DRIVER_AT91EMAC
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#define CONFIG_SYS_RX_ETH_BUFFER 16
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#define CONFIG_RMII
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#define CONFIG_MII
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#define CONFIG_DRIVER_AT91EMAC_PHYADDR 1
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_KS8721_PHY
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_EMPTY_INFO
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#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_PROTECTION
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#define PHYS_FLASH_1 0x10000000
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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#define CONFIG_SYS_MAX_FLASH_SECT 128
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#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
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#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
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#define PHYS_FLASH_SIZE (16 * 1024 * 1024)
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#define CONFIG_SYS_FLASH_BANKS_LIST \
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{ PHYS_FLASH_1 }
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#if defined(CONFIG_CMD_USB)
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#define CONFIG_USB_ATMEL
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#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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#define CONFIG_AT91C_PQFP_UHPBU
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#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
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#define CONFIG_SYS_USB_OHCI_CPU_INIT
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#define CONFIG_SYS_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
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#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200"
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
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#endif
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 128 * 1024)
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#define CONFIG_ENV_SIZE (128 * 1024)
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#define CONFIG_ENV_SECT_SIZE (128 * 1024)
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#define CONFIG_SYS_LOAD_ADDR 0x21000000
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#define CONFIG_BAUDRATE 115200
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#define CONFIG_SYS_PROMPT "CPUAT91=> "
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#define CONFIG_SYS_CBSIZE 256
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#define CONFIG_SYS_MAXARGS 32
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_MALLOC_LEN \
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ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 4 * 1024)
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_DEVICE_NULLDEV
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#define CONFIG_SILENT_CONSOLE
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT \
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"Press SPACE to abort autoboot\n"
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#define CONFIG_AUTOBOOT_STOP_STR " "
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#define CONFIG_AUTOBOOT_DELAY_STR "d"
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#define CONFIG_VERSION_VARIABLE
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#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
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#define MTDPARTS_DEFAULT \
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"mtdparts=physmap-flash.0:" \
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"128k(u-boot)ro," \
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"128k(u-boot-env)," \
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"1792k(kernel)," \
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"-(rootfs)"
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#define CONFIG_BOOTARGS \
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"root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,115200"
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#define CONFIG_BOOTCOMMAND "run flashboot"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"mtdid=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"flub=tftp 21000000 cpuat91/u-boot.bin; protect off 10000000 " \
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"1001FFFF; erase 10000000 1001FFFF; cp.b 21000000 " \
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"10000000 ${filesize}\0" \
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"flui=tftp 21000000 cpuat91/uImage; protect off 10040000 " \
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"1019ffff; erase 10040000 101fffff; cp.b 21000000 " \
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"10040000 ${filesize}\0" \
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"flrfs=tftp 21000000 cpuat91/rootfs.jffs2; protect off " \
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"10200000 10ffffff; erase 10200000 10ffffff; cp.b " \
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"21000000 10200000 ${filesize}\0" \
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"ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \
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"flashboot=run ramargs;bootm 10040000\0" \
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"netboot=run ramargs;tftpboot 21000000 cpuat91/uImage;" \
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"bootm 21000000\0"
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#endif /* _CONFIG_CPUAT91_H */
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