mirror of
https://github.com/brain-hackers/u-boot-brain
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883 lines
24 KiB
C
883 lines
24 KiB
C
/*
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* (C) Copyright 2000, 2001
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Modified 4/5/2001
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* Wait for completion of each sector erase command issued
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* 4/5/2001
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* Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
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*/
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/*
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* Modified 3/7/2001
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* - adapted for pip405, Denis Peter, MPL AG Switzerland
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* TODO:
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* clean-up
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*/
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#include <common.h>
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#if !defined(CONFIG_PATI)
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#include <ppc4xx.h>
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#include <asm/processor.h>
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#include "common_util.h"
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#if defined(CONFIG_MIP405)
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#include "../mip405/mip405.h"
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#endif
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#if defined(CONFIG_PIP405)
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#include "../pip405/pip405.h"
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#endif
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#include <asm/4xx_pci.h>
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#else /* defined(CONFIG_PATI) */
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#include <mpc5xx.h>
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#endif
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flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info);
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static int write_word (flash_info_t *info, ulong dest, ulong data);
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void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt);
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#define ADDR0 0x5555
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#define ADDR1 0x2aaa
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#define FLASH_WORD_SIZE unsigned short
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#define FALSE 0
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#define TRUE 1
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#if !defined(CONFIG_PATI)
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/*-----------------------------------------------------------------------
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* Some CS switching routines:
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*
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* On PIP/MIP405 we have 3 (4) possible boot mode
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*
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* - Boot from Flash (Flash CS = CS0, MPS CS = CS1)
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* - Boot from MPS (Flash CS = CS1, MPS CS = CS0)
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* - Boot from PCI with Flash map (Flash CS = CS0, MPS CS = CS1)
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* - Boot from PCI with MPS map (Flash CS = CS1, MPS CS = CS0)
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* The flash init is the first board specific routine which is called
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* after code relocation (running from SDRAM)
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* The first thing we do is to map the Flash CS to the Flash area and
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* the MPS CS to the MPS area. Since the flash size is unknown at this
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* point, we use the max flash size and the lowest flash address as base.
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*
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* After flash detection we adjust the size of the CS area accordingly.
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* The board_init_r will fill in wrong values in the board init structure,
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* but this will be fixed in the misc_init_r routine:
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* bd->bi_flashstart=0-flash_info[0].size
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* bd->bi_flashsize=flash_info[0].size-CFG_MONITOR_LEN
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* bd->bi_flashoffset=0
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*
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*/
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int get_boot_mode(void)
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{
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unsigned long pbcr;
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int res = 0;
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pbcr = mfdcr (strap);
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if ((pbcr & PSR_ROM_WIDTH_MASK) == 0)
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/* boot via MPS or MPS mapping */
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res = BOOT_MPS;
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if(pbcr & PSR_ROM_LOC)
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/* boot via PCI.. */
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res |= BOOT_PCI;
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return res;
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}
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/* Map the flash high (in boot area)
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This code can only be executed from SDRAM (after relocation).
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*/
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void setup_cs_reloc(void)
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{
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int mode;
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/* Since we are relocated, we can set-up the CS finaly
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* but first of all, switch off PCI mapping (in case it was a PCI boot) */
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out32r(PMM0MA,0L);
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icache_enable (); /* we are relocated */
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/* get boot mode */
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mode=get_boot_mode();
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/* we map the flash high in every case */
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/* first findout on which cs the flash is */
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if(mode & BOOT_MPS) {
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/* map flash high on CS1 and MPS on CS0 */
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mtdcr (ebccfga, pb0ap);
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mtdcr (ebccfgd, MPS_AP);
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mtdcr (ebccfga, pb0cr);
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mtdcr (ebccfgd, MPS_CR);
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/* we use the default values (max values) for the flash
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* because its real size is not yet known */
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mtdcr (ebccfga, pb1ap);
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mtdcr (ebccfgd, FLASH_AP);
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mtdcr (ebccfga, pb1cr);
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mtdcr (ebccfgd, FLASH_CR_B);
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}
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else {
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/* map flash high on CS0 and MPS on CS1 */
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mtdcr (ebccfga, pb1ap);
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mtdcr (ebccfgd, MPS_AP);
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mtdcr (ebccfga, pb1cr);
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mtdcr (ebccfgd, MPS_CR);
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/* we use the default values (max values) for the flash
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* because its real size is not yet known */
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mtdcr (ebccfga, pb0ap);
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mtdcr (ebccfgd, FLASH_AP);
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mtdcr (ebccfga, pb0cr);
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mtdcr (ebccfgd, FLASH_CR_B);
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}
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}
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#endif /* #if !defined(CONFIG_PATI) */
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unsigned long flash_init (void)
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{
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unsigned long size_b0;
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int i;
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#if !defined(CONFIG_PATI)
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unsigned long size_b1,flashcr,size_reg;
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int mode;
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extern char version_string;
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char *p = &version_string;
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/* Since we are relocated, we can set-up the CS finally */
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setup_cs_reloc();
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/* get and display boot mode */
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mode=get_boot_mode();
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if(mode & BOOT_PCI)
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printf("(PCI Boot %s Map) ",(mode & BOOT_MPS) ?
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"MPS" : "Flash");
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else
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printf("(%s Boot) ",(mode & BOOT_MPS) ?
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"MPS" : "Flash");
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#endif /* #if !defined(CONFIG_PATI) */
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/* Init: no FLASHes known */
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for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
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flash_info[i].flash_id = FLASH_UNKNOWN;
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}
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/* Static FLASH Bank configuration here - FIXME XXX */
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size_b0 = flash_get_size((vu_long *)CFG_MONITOR_BASE, &flash_info[0]);
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if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
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size_b0, size_b0<<20);
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}
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/* protect the bootloader */
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/* Monitor protection ON by default */
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#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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flash_protect(FLAG_PROTECT_SET,
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CFG_MONITOR_BASE,
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CFG_MONITOR_BASE+monitor_flash_len-1,
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&flash_info[0]);
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#endif
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#if !defined(CONFIG_PATI)
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/* protect reset vector */
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flash_info[0].protect[flash_info[0].sector_count-1] = 1;
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size_b1 = 0 ;
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flash_info[0].size = size_b0;
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/* set up flash cs according to the size */
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size_reg=(flash_info[0].size >>20);
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switch (size_reg) {
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case 0:
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case 1: i=0; break; /* <= 1MB */
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case 2: i=1; break; /* = 2MB */
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case 4: i=2; break; /* = 4MB */
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case 8: i=3; break; /* = 8MB */
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case 16: i=4; break; /* = 16MB */
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case 32: i=5; break; /* = 32MB */
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case 64: i=6; break; /* = 64MB */
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case 128: i=7; break; /*= 128MB */
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default:
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printf("\n #### ERROR, wrong size %ld MByte reset board #####\n",size_reg);
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while(1);
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}
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if(mode & BOOT_MPS) {
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/* flash is on CS1 */
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mtdcr(ebccfga, pb1cr);
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flashcr = mfdcr (ebccfgd);
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/* we map the flash high in every case */
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flashcr&=0x0001FFFF; /* mask out address bits */
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flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
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flashcr|= (i << 17); /* size addr */
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mtdcr(ebccfga, pb1cr);
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mtdcr(ebccfgd, flashcr);
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}
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else {
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/* flash is on CS0 */
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mtdcr(ebccfga, pb0cr);
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flashcr = mfdcr (ebccfgd);
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/* we map the flash high in every case */
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flashcr&=0x0001FFFF; /* mask out address bits */
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flashcr|= ((0-flash_info[0].size) & 0xFFF00000); /* start addr */
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flashcr|= (i << 17); /* size addr */
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mtdcr(ebccfga, pb0cr);
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mtdcr(ebccfgd, flashcr);
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}
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#if 0
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/* enable this (PIP405/MIP405 only) if you want to test if
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the relocation has be done ok.
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This will disable both Chipselects */
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mtdcr (ebccfga, pb0cr);
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mtdcr (ebccfgd, 0L);
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mtdcr (ebccfga, pb1cr);
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mtdcr (ebccfgd, 0L);
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printf("CS0 & CS1 switched off for test\n");
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#endif
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/* patch version_string */
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for(i=0;i<0x100;i++) {
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if(*p=='\n') {
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*p=0;
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break;
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}
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p++;
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}
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#else /* #if !defined(CONFIG_PATI) */
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#ifdef CFG_ENV_IS_IN_FLASH
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/* ENV protection ON by default */
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flash_protect(FLAG_PROTECT_SET,
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CFG_ENV_ADDR,
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CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
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&flash_info[0]);
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#endif
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#endif /* #if !defined(CONFIG_PATI) */
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return (size_b0);
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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int k;
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int size;
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int erased;
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volatile unsigned long *flash;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_AMD: printf ("AMD "); break;
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case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
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case FLASH_MAN_SST: printf ("SST "); break;
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case FLASH_MAN_INTEL: printf ("Intel "); break;
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default: printf ("Unknown Vendor "); break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_AM040: printf ("AM29F040 (512 Kbit, uniform sector size)\n");
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break;
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case FLASH_AM400B: printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM400T: printf ("AM29LV400T (4 Mbit, top boot sector)\n");
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break;
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case FLASH_AM800B: printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM800T: printf ("AM29LV800T (8 Mbit, top boot sector)\n");
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break;
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case FLASH_AM160B: printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM160T: printf ("AM29LV160T (16 Mbit, top boot sector)\n");
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break;
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case FLASH_AM320B: printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
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break;
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case FLASH_AM320T: printf ("AM29LV320T (32 Mbit, top boot sector)\n");
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break;
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case FLASH_SST800A: printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
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break;
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case FLASH_SST160A: printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
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break;
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case FLASH_INTEL320T: printf ("TE28F320C3 (32 Mbit, top sector size)\n");
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break;
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case FLASH_AM640U: printf ("AM29LV640U (64 Mbit, uniform sector size)\n");
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break;
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default: printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld KB in %d Sectors\n",
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info->size >> 10, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i=0; i<info->sector_count; ++i) {
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/*
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* Check if whole sector is erased
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*/
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if (i != (info->sector_count-1))
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size = info->start[i+1] - info->start[i];
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else
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size = info->start[0] + info->size - info->start[i];
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erased = 1;
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flash = (volatile unsigned long *)info->start[i];
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size = size >> 2; /* divide by 4 for longword access */
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for (k=0; k<size; k++) {
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if (*flash++ != 0xffffffff) {
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erased = 0;
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break;
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}
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}
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s%s",
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info->start[i],
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erased ? " E" : " ",
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info->protect[i] ? "RO " : " ");
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}
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printf ("\n");
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}
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/*-----------------------------------------------------------------------
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*/
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/*-----------------------------------------------------------------------
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*/
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (vu_long *addr, flash_info_t *info)
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{
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short i;
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FLASH_WORD_SIZE value;
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ulong base;
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volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr;
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/* Write auto select command: read Manufacturer ID */
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addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
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addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
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addr2[ADDR0] = (FLASH_WORD_SIZE)0x00900090;
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value = addr2[0];
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/* printf("flash_get_size value: %x\n",value); */
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switch (value) {
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case (FLASH_WORD_SIZE)AMD_MANUFACT:
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info->flash_id = FLASH_MAN_AMD;
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break;
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case (FLASH_WORD_SIZE)FUJ_MANUFACT:
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info->flash_id = FLASH_MAN_FUJ;
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break;
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case (FLASH_WORD_SIZE)INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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case (FLASH_WORD_SIZE)SST_MANUFACT:
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info->flash_id = FLASH_MAN_SST;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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return (0); /* no or unknown flash */
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}
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value = addr2[1]; /* device ID */
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/* printf("Device value %x\n",value); */
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switch (value) {
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case (FLASH_WORD_SIZE)AMD_ID_F040B:
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info->flash_id += FLASH_AM040;
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info->sector_count = 8;
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info->size = 0x0080000; /* => 512 ko */
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break;
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case (FLASH_WORD_SIZE)AMD_ID_LV400T:
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info->flash_id += FLASH_AM400T;
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info->sector_count = 11;
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info->size = 0x00080000;
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break; /* => 0.5 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV400B:
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info->flash_id += FLASH_AM400B;
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info->sector_count = 11;
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info->size = 0x00080000;
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break; /* => 0.5 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV800T:
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info->flash_id += FLASH_AM800T;
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info->sector_count = 19;
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info->size = 0x00100000;
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break; /* => 1 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV800B:
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info->flash_id += FLASH_AM800B;
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info->sector_count = 19;
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info->size = 0x00100000;
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break; /* => 1 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV160T:
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info->flash_id += FLASH_AM160T;
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info->sector_count = 35;
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info->size = 0x00200000;
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break; /* => 2 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV160B:
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info->flash_id += FLASH_AM160B;
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info->sector_count = 35;
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info->size = 0x00200000;
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break; /* => 2 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV320T:
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info->flash_id += FLASH_AM320T;
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info->sector_count = 67;
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info->size = 0x00400000;
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break; /* => 4 MB */
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case (FLASH_WORD_SIZE)AMD_ID_LV640U:
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info->flash_id += FLASH_AM640U;
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info->sector_count = 128;
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info->size = 0x00800000;
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break; /* => 8 MB */
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#if 0 /* enable when device IDs are available */
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case (FLASH_WORD_SIZE)AMD_ID_LV320B:
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info->flash_id += FLASH_AM320B;
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info->sector_count = 67;
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info->size = 0x00400000;
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break; /* => 4 MB */
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#endif
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case (FLASH_WORD_SIZE)SST_ID_xF800A:
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info->flash_id += FLASH_SST800A;
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info->sector_count = 16;
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info->size = 0x00100000;
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break; /* => 1 MB */
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case (FLASH_WORD_SIZE)INTEL_ID_28F320C3T:
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info->flash_id += FLASH_INTEL320T;
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info->sector_count = 71;
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info->size = 0x00400000;
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break; /* => 4 MB */
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case (FLASH_WORD_SIZE)SST_ID_xF160A:
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info->flash_id += FLASH_SST160A;
|
|
info->sector_count = 32;
|
|
info->size = 0x00200000;
|
|
break; /* => 2 MB */
|
|
|
|
default:
|
|
info->flash_id = FLASH_UNKNOWN;
|
|
return (0); /* => no or unknown flash */
|
|
|
|
}
|
|
/* base address calculation */
|
|
base=0-info->size;
|
|
/* set up sector start address table */
|
|
if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
|
|
(info->flash_id == FLASH_AM040) ||
|
|
(info->flash_id == FLASH_AM640U)){
|
|
for (i = 0; i < info->sector_count; i++)
|
|
info->start[i] = base + (i * 0x00010000);
|
|
}
|
|
else {
|
|
if (info->flash_id & FLASH_BTYPE) {
|
|
/* set sector offsets for bottom boot block type */
|
|
info->start[0] = base + 0x00000000;
|
|
info->start[1] = base + 0x00004000;
|
|
info->start[2] = base + 0x00006000;
|
|
info->start[3] = base + 0x00008000;
|
|
for (i = 4; i < info->sector_count; i++)
|
|
info->start[i] = base + (i * 0x00010000) - 0x00030000;
|
|
}
|
|
else {
|
|
/* set sector offsets for top boot block type */
|
|
i = info->sector_count - 1;
|
|
if(info->sector_count==71) {
|
|
|
|
info->start[i--] = base + info->size - 0x00002000;
|
|
info->start[i--] = base + info->size - 0x00004000;
|
|
info->start[i--] = base + info->size - 0x00006000;
|
|
info->start[i--] = base + info->size - 0x00008000;
|
|
info->start[i--] = base + info->size - 0x0000A000;
|
|
info->start[i--] = base + info->size - 0x0000C000;
|
|
info->start[i--] = base + info->size - 0x0000E000;
|
|
for (; i >= 0; i--)
|
|
info->start[i] = base + i * 0x000010000;
|
|
}
|
|
else {
|
|
info->start[i--] = base + info->size - 0x00004000;
|
|
info->start[i--] = base + info->size - 0x00006000;
|
|
info->start[i--] = base + info->size - 0x00008000;
|
|
for (; i >= 0; i--)
|
|
info->start[i] = base + i * 0x00010000;
|
|
}
|
|
}
|
|
}
|
|
|
|
/* check for protected sectors */
|
|
for (i = 0; i < info->sector_count; i++) {
|
|
/* read sector protection at sector address, (A7 .. A0) = 0x02 */
|
|
/* D0 = 1 if protected */
|
|
addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]);
|
|
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL)
|
|
info->protect[i] = 0;
|
|
else
|
|
info->protect[i] = addr2[2] & 1;
|
|
}
|
|
|
|
/*
|
|
* Prevent writes to uninitialized FLASH.
|
|
*/
|
|
if (info->flash_id != FLASH_UNKNOWN) {
|
|
addr2 = (FLASH_WORD_SIZE *)info->start[0];
|
|
*addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
|
|
}
|
|
return (info->size);
|
|
}
|
|
|
|
|
|
int wait_for_DQ7(flash_info_t *info, int sect)
|
|
{
|
|
ulong start, now, last;
|
|
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
|
|
|
|
start = get_timer (0);
|
|
last = start;
|
|
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
|
|
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
printf ("Timeout\n");
|
|
return ERR_TIMOUT;
|
|
}
|
|
/* show that we're waiting */
|
|
if ((now - last) > 1000) { /* every second */
|
|
putc ('.');
|
|
last = now;
|
|
}
|
|
}
|
|
return ERR_OK;
|
|
}
|
|
|
|
int intel_wait_for_DQ7(flash_info_t *info, int sect)
|
|
{
|
|
ulong start, now, last, status;
|
|
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[sect]);
|
|
|
|
start = get_timer (0);
|
|
last = start;
|
|
while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
|
|
if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
printf ("Timeout\n");
|
|
return ERR_TIMOUT;
|
|
}
|
|
/* show that we're waiting */
|
|
if ((now - last) > 1000) { /* every second */
|
|
putc ('.');
|
|
last = now;
|
|
}
|
|
}
|
|
status = addr[0] & (FLASH_WORD_SIZE)0x00280028;
|
|
/* clear status register */
|
|
addr[0] = (FLASH_WORD_SIZE)0x00500050;
|
|
/* check status for block erase fail and VPP low */
|
|
return (status == 0 ? ERR_OK : ERR_NOT_ERASED);
|
|
}
|
|
|
|
/*-----------------------------------------------------------------------
|
|
*/
|
|
|
|
int flash_erase (flash_info_t *info, int s_first, int s_last)
|
|
{
|
|
volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]);
|
|
volatile FLASH_WORD_SIZE *addr2;
|
|
int flag, prot, sect, l_sect;
|
|
int i, rcode = 0;
|
|
|
|
|
|
if ((s_first < 0) || (s_first > s_last)) {
|
|
if (info->flash_id == FLASH_UNKNOWN) {
|
|
printf ("- missing\n");
|
|
} else {
|
|
printf ("- no sectors to erase\n");
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
if (info->flash_id == FLASH_UNKNOWN) {
|
|
printf ("Can't erase unknown flash type - aborted\n");
|
|
return 1;
|
|
}
|
|
|
|
prot = 0;
|
|
for (sect=s_first; sect<=s_last; ++sect) {
|
|
if (info->protect[sect]) {
|
|
prot++;
|
|
}
|
|
}
|
|
|
|
if (prot) {
|
|
printf ("- Warning: %d protected sectors will not be erased!\n",
|
|
prot);
|
|
} else {
|
|
printf ("\n");
|
|
}
|
|
|
|
l_sect = -1;
|
|
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
|
|
/* Start erase on unprotected sectors */
|
|
for (sect = s_first; sect<=s_last; sect++) {
|
|
if (info->protect[sect] == 0) { /* not protected */
|
|
addr2 = (FLASH_WORD_SIZE *)(info->start[sect]);
|
|
/* printf("Erasing sector %p\n", addr2); */ /* CLH */
|
|
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */
|
|
for (i=0; i<50; i++)
|
|
udelay(1000); /* wait 1 ms */
|
|
rcode |= wait_for_DQ7(info, sect);
|
|
}
|
|
else {
|
|
if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
|
|
intel_wait_for_DQ7(info, sect);
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00200020; /* sector erase */
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */
|
|
rcode |= intel_wait_for_DQ7(info, sect);
|
|
}
|
|
else {
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080;
|
|
addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */
|
|
rcode |= wait_for_DQ7(info, sect);
|
|
}
|
|
}
|
|
l_sect = sect;
|
|
/*
|
|
* Wait for each sector to complete, it's more
|
|
* reliable. According to AMD Spec, you must
|
|
* issue all erase commands within a specified
|
|
* timeout. This has been seen to fail, especially
|
|
* if printf()s are included (for debug)!!
|
|
*/
|
|
/* wait_for_DQ7(info, sect); */
|
|
}
|
|
}
|
|
|
|
/* re-enable interrupts if necessary */
|
|
if (flag)
|
|
enable_interrupts();
|
|
|
|
/* wait at least 80us - let's wait 1 ms */
|
|
udelay (1000);
|
|
|
|
#if 0
|
|
/*
|
|
* We wait for the last triggered sector
|
|
*/
|
|
if (l_sect < 0)
|
|
goto DONE;
|
|
wait_for_DQ7(info, l_sect);
|
|
|
|
DONE:
|
|
#endif
|
|
/* reset to read mode */
|
|
addr = (FLASH_WORD_SIZE *)info->start[0];
|
|
addr[0] = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */
|
|
|
|
if (!rcode)
|
|
printf (" done\n");
|
|
|
|
return rcode;
|
|
}
|
|
|
|
|
|
void unlock_intel_sectors(flash_info_t *info,ulong addr,ulong cnt)
|
|
{
|
|
int i;
|
|
volatile FLASH_WORD_SIZE *addr2;
|
|
long c;
|
|
c= (long)cnt;
|
|
for(i=info->sector_count-1;i>0;i--)
|
|
{
|
|
if(addr>=info->start[i])
|
|
break;
|
|
}
|
|
do {
|
|
addr2 = (FLASH_WORD_SIZE *)(info->start[i]);
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector setup */
|
|
addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* unlock sector */
|
|
intel_wait_for_DQ7(info, i);
|
|
i++;
|
|
c-=(info->start[i]-info->start[i-1]);
|
|
}while(c>0);
|
|
}
|
|
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Copy memory to flash, returns:
|
|
* 0 - OK
|
|
* 1 - write timeout
|
|
* 2 - Flash not erased
|
|
*/
|
|
|
|
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
|
{
|
|
ulong cp, wp, data;
|
|
int i, l, rc;
|
|
|
|
if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
|
|
unlock_intel_sectors(info,addr,cnt);
|
|
}
|
|
wp = (addr & ~3); /* get lower word aligned address */
|
|
/*
|
|
* handle unaligned start bytes
|
|
*/
|
|
if ((l = addr - wp) != 0) {
|
|
data = 0;
|
|
for (i=0, cp=wp; i<l; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
for (; i<4 && cnt>0; ++i) {
|
|
data = (data << 8) | *src++;
|
|
--cnt;
|
|
++cp;
|
|
}
|
|
for (; cnt==0 && i<4; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
|
|
if ((rc = write_word(info, wp, data)) != 0) {
|
|
return (rc);
|
|
}
|
|
wp += 4;
|
|
}
|
|
|
|
/*
|
|
* handle word aligned part
|
|
*/
|
|
while (cnt >= 4) {
|
|
data = 0;
|
|
for (i=0; i<4; ++i) {
|
|
data = (data << 8) | *src++;
|
|
}
|
|
if ((rc = write_word(info, wp, data)) != 0) {
|
|
return (rc);
|
|
}
|
|
wp += 4;
|
|
if((wp % 0x10000)==0)
|
|
printf("."); /* show Progress */
|
|
cnt -= 4;
|
|
}
|
|
|
|
if (cnt == 0) {
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* handle unaligned tail bytes
|
|
*/
|
|
data = 0;
|
|
for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
|
data = (data << 8) | *src++;
|
|
--cnt;
|
|
}
|
|
for (; i<4; ++i, ++cp) {
|
|
data = (data << 8) | (*(uchar *)cp);
|
|
}
|
|
rc=write_word(info, wp, data);
|
|
return rc;
|
|
}
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Write a word to Flash, returns:
|
|
* 0 - OK
|
|
* 1 - write timeout
|
|
* 2 - Flash not erased
|
|
*/
|
|
static FLASH_WORD_SIZE *read_val = (FLASH_WORD_SIZE *)0x200000;
|
|
|
|
static int write_word (flash_info_t *info, ulong dest, ulong data)
|
|
{
|
|
volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]);
|
|
volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest;
|
|
volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data;
|
|
ulong start;
|
|
int flag;
|
|
int i;
|
|
|
|
/* Check if Flash is (sufficiently) erased */
|
|
if ((*((volatile FLASH_WORD_SIZE *)dest) &
|
|
(FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) {
|
|
return (2);
|
|
}
|
|
/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts();
|
|
for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++)
|
|
{
|
|
if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){
|
|
/* intel style writting */
|
|
dest2[i] = (FLASH_WORD_SIZE)0x00500050;
|
|
dest2[i] = (FLASH_WORD_SIZE)0x00400040;
|
|
*read_val++ = data2[i];
|
|
dest2[i] = data2[i];
|
|
if (flag)
|
|
enable_interrupts();
|
|
/* data polling for D7 */
|
|
start = get_timer (0);
|
|
udelay(10);
|
|
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080)
|
|
{
|
|
if (get_timer(start) > CFG_FLASH_WRITE_TOUT)
|
|
return (1);
|
|
}
|
|
dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
|
|
udelay(10);
|
|
dest2[i] = (FLASH_WORD_SIZE)0x00FF00FF; /* return to read mode */
|
|
if(dest2[i]!=data2[i])
|
|
printf("Error at %p 0x%04X != 0x%04X\n",&dest2[i],dest2[i],data2[i]);
|
|
}
|
|
else {
|
|
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA;
|
|
addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055;
|
|
addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0;
|
|
dest2[i] = data2[i];
|
|
/* re-enable interrupts if necessary */
|
|
if (flag)
|
|
enable_interrupts();
|
|
/* data polling for D7 */
|
|
start = get_timer (0);
|
|
while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) !=
|
|
(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
|
|
if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
|
|
return (1);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
/*-----------------------------------------------------------------------
|
|
*/
|