Suneel Garapati 4cf56ec07f pci: pci-uclass: Add multi entry support for memory regions ... Enable PCI memory regions in ranges property to be of multiple entry. This helps to add support for SoC's like OcteonTX/TX2 where every peripheral is on PCI bus. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>		2020-08-25 08:01:16 +02:00
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include	Makefile: Support include files for .dts files	2014-06-20 11:55:03 -06:00
cros-ec-keyboard.dtsi	cros_ec: exynos: Match up device tree with kernel version	2015-04-18 11:11:16 -06:00
Makefile	SPDX: Convert all of our single license tags to Linux Kernel style	2018-05-07 09:34:12 -04:00
sandbox_pmic.dtsi	dm: sandbox: i2c: Use new emulator parent uclass	2018-11-29 09:30:05 -07:00
sandbox.dts	sandbox: add reserved-memory node in device tree	2020-04-16 08:07:58 -06:00
sandbox.dtsi	sandbox: dtsi: add buttons	2020-07-28 19:30:39 -06:00
sandbox64.dts	sandbox: add reserved-memory node in device tree	2020-04-16 08:07:58 -06:00
test.dts	pci: pci-uclass: Add multi entry support for memory regions	2020-08-25 08:01:16 +02:00