mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-09 20:56:16 +09:00
4ceb5c6db2
Add basic support for the Kontron SMARC-sAL28 board. This includes just the bare minimum to be able to bring up the board and boot linux. For now, the Single and Dual PHY variant is supported. Other variants will fall back to the basic variant. In particular, there is no watchdog support for now. This means that you have to disable the default watchdog, otherwise you'll end up in the recovery bootloader. See the board README for details. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Heiko Thiery <heiko.thiery@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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#ifndef __SL28_H
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#define __SL28_H
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#include <asm/arch/stream_id_lsch3.h>
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#include <asm/arch/config.h>
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#include <asm/arch/soc.h>
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/* we don't use hwconfig but this has to be defined.. */
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#define HWCONFIG_BUFFER_SIZE 256
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/* we don't have secure memory unless we have a BL31 */
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#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
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#undef CONFIG_SYS_MEM_RESERVE_SECURE
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#endif
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/* DDR */
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#define CONFIG_DDR_ECC
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#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
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#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
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#define CONFIG_VERY_BIG_RAM
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#define CONFIG_CHIP_SELECTS_PER_CTRL 4
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#define CONFIG_DIMM_SLOTS_PER_CTLR 1
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#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
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#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
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#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
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#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
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/* early stack pointer */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
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/* memtest command */
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END 0x9fffffff
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/* SMP */
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#define CPU_RELEASE_ADDR secondary_boot_addr
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/* generic timer */
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#define COUNTER_FREQUENCY 25000000
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/* size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2048 * 1024)
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/* early heap for SPL DM */
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#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE
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/* serial port */
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE 1
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#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
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#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_SYS_CLK_FREQ 100000000
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#define CONFIG_DDR_CLK_FREQ 100000000
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#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
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/* MMC */
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#ifdef CONFIG_MMC
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#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
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#endif
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/* ethernet */
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#define CONFIG_SYS_RX_ETH_BUFFER 8
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/* SPL */
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#define CONFIG_SPL_BSS_START_ADDR 0x80100000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
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#define CONFIG_SPL_MAX_SIZE 0x20000
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#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
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#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
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/* environment */
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/* see include/configs/ti_armv7_common.h */
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#define CONFIG_SYS_LOAD_ADDR 0x82000000
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#define ENV_MEM_LAYOUT_SETTINGS \
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"loadaddr=0x82000000\0" \
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"kernel_addr_r=0x82000000\0" \
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"fdt_addr_r=0x88000000\0" \
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"bootm_size=0x10000000\0" \
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"pxefile_addr_r=0x80100000\0" \
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"scriptaddr=0x80000000\0" \
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"ramdisk_addr_r=0x88080000\0"
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(NVME, nvme, 0) \
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func(USB, usb, 0) \
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func(DHCP, dhcp, 0) \
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func(PXE, pxe, 0)
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"env_addr=0x203e0004\0" \
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"envload=env import -d -b ${env_addr}\0" \
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"install_rcw=source 20200000\0" \
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"fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
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ENV_MEM_LAYOUT_SETTINGS \
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BOOTENV
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#endif /* __SL28_H */
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