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![Simon Glass](/assets/img/avatar_default.png)
This Rockchip PMIC provides features suitable for battery-powered applications. It is commonly used with Rockchip SoCs. Add a driver which provides register access. The regulator driver will use this. Signed-off-by: Simon Glass <sjg@chromium.org>
78 lines
1.1 KiB
C
78 lines
1.1 KiB
C
/*
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* Copyright (C) 2015 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _PMIC_RK808_H_
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#define _PMIC_RK808_H_
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enum {
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REG_DCDC_EN = 0x23,
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REG_LDO_EN,
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REG_SLEEP_SET_OFF1,
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REG_SLEEP_SET_OFF2,
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REG_DCDC_UV_STS,
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REG_DCDC_UV_ACT,
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REG_LDO_UV_STS,
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REG_LDO_UV_ACT,
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REG_DCDC_PG,
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REG_LDO_PG,
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REG_VOUT_MON_TDB,
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REG_BUCK1_CONFIG,
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REG_BUCK1_ON_VSEL,
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REG_BUCK1_SLP_VSEL,
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REG_BUCK1_DVS_VSEL,
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REG_BUCK2_CONFIG,
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REG_BUCK2_ON_VSEL,
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REG_BUCK2_SLP_VSEL,
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REG_BUCK2_DVS_VSEL,
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REG_BUCK3_CONFIG,
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REG_BUCK4_CONFIG,
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REG_BUCK4_ON_VSEL,
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REG_BUCK4_SLP_VSEL,
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LDO1_ON_VSEL = 0x3b,
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LDO1_SLP_VSEL,
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LDO2_ON_VSEL,
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LDO2_SLP_VSEL,
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LDO3_ON_VSEL,
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LDO3_SLP_VSEL,
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LDO4_ON_VSEL,
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LDO4_SLP_VSEL,
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LDO5_ON_VSEL,
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LDO5_SLP_VSEL,
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LDO6_ON_VSEL,
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LDO6_SLP_VSEL,
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LDO7_ON_VSEL,
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LDO7_SLP_VSEL,
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LDO8_ON_VSEL,
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LDO8_SLP_VSEL,
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DEVCTRL,
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INT_STS1,
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INT_STS_MSK1,
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INT_STS2,
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INT_STS_MSK2,
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IO_POL,
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/* Not sure what this does */
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DCDC_ILMAX = 0x90,
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RK808_NUM_OF_REGS,
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};
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struct rk808_reg_table {
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char *name;
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u8 reg_ctl;
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u8 reg_vol;
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};
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int rk808_spl_configure_buck(struct udevice *pmic, int buck, int uvolt);
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#endif
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