u-boot-brain/drivers/clk/rockchip
Philipp Tomsich 4bebf94e85 rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM
The RK3368 has a somewhat temperamental BootROM (which I learned the
hard way) when it comes to reconfiguring the CPLL and GPLL (in fact,
experiments show that changing the GPLL broke things for me, while
changing the CPLL seems to be more benign).  These should not be
modified by the SPL stage, if we intend to return to the BootROM for
chain booting the next stage.

This commit changes the clock initialisation to not change CPLL/GPLL
before returning to the BootROM (i.e. in TPL).  As it's safe to change
these settings if we no longer intend to return to U-Boot, we'll run
the full PLL setup a little later (i.e. in SPL).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-13 17:12:32 +02:00
..
clk_rk322x.c rockchip: rk322x: add clock driver 2017-07-11 12:13:45 +02:00
clk_rk3036.c rockchip: clk: rk3036: correct setting for pll integer mode 2017-06-23 16:40:23 +02:00
clk_rk3188.c dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
clk_rk3288.c rockchip: Init clocks again when chain-loading 2017-06-09 13:45:33 -06:00
clk_rk3328.c dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
clk_rk3368.c rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROM 2017-08-13 17:12:32 +02:00
clk_rk3399.c dm: Rename dev_addr..() functions 2017-06-01 07:03:01 -06:00
clk_rv1108.c clk_rv1108.c: Fix unused variable warning 2017-06-23 10:38:05 -04:00
Makefile rockchip: rk322x: add clock driver 2017-07-11 12:13:45 +02:00