mirror of
https://github.com/brain-hackers/u-boot-brain
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09f3ca3dd5
We have finished Generic Board conversion for ARM and PowerPC, i.e. all the boards have been converted except OpenRISC, SuperH, SPARC, which have not supported Generic Board framework yet. Select SYS_GENERIC_BOARD in arch/Kconfig and delete all the macro defines in include/configs/*.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
197 lines
5.0 KiB
C
197 lines
5.0 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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* Gary Jennejohn <garyj@denx.de>
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* David Mueller <d.mueller@elsoft.ch>
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*
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* Configuation settings for the SAMSUNG SMDK2410 board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_S3C24X0 /* This is a SAMSUNG S3C24x0-type SoC */
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#define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
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#define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
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#define CONFIG_SYS_TEXT_BASE 0x0
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#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
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/* input clock of PLL (the SMDK2410 has 12MHz input clock) */
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#define CONFIG_SYS_CLK_FREQ 12000000
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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/*
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* Hardware drivers
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*/
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#define CONFIG_CS8900 /* we have a CS8900 on-board */
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#define CONFIG_CS8900_BASE 0x19000300
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#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
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/*
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* select serial console configuration
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*/
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#define CONFIG_S3C24X0_SERIAL
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#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
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/************************************************************
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* USB support (currently only works with D-cache off)
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************************************************************/
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#define CONFIG_USB_OHCI
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#define CONFIG_USB_OHCI_S3C24XX
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#define CONFIG_USB_KEYBOARD
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#define CONFIG_USB_STORAGE
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#define CONFIG_DOS_PARTITION
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/************************************************************
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* RTC
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************************************************************/
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#define CONFIG_RTC_S3C24X0
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#define CONFIG_BAUDRATE 115200
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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/*
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* Command line configuration.
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*/
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#define CONFIG_CMD_BSP
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#define CONFIG_CMD_CACHE
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#define CONFIG_CMD_DATE
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_USB
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_CMDLINE_EDITING
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/* autoboot */
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#define CONFIG_BOOTDELAY 5
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#define CONFIG_BOOT_RETRY_TIME -1
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#define CONFIG_RESET_TO_RETRY
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#define CONFIG_ZERO_BOOTDELAY_CHECK
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 10.0.0.110
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#define CONFIG_SERVERIP 10.0.0.1
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#if defined(CONFIG_CMD_KGDB)
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#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
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#endif
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/*
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* Miscellaneous configurable options
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*/
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
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#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
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#define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
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#define CONFIG_SYS_LOAD_ADDR 0x30800000
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/* support additional compression methods */
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#define CONFIG_BZIP2
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#define CONFIG_LZO
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#define CONFIG_LZMA
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
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#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
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#define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
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#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_FLASH_CFI_DRIVER
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#define CONFIG_FLASH_CFI_LEGACY
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#define CONFIG_SYS_FLASH_LEGACY_512Kx16
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#define CONFIG_FLASH_SHOW_PROGRESS 45
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
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#define CONFIG_SYS_MAX_FLASH_SECT (19)
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#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
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#define CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_ENV_SIZE 0x10000
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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/*
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* Size of malloc() pool
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* BZIP2 / LZO / LZMA need a lot of RAM
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*/
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#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
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#define CONFIG_SYS_MONITOR_LEN (448 * 1024)
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#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
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/*
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* NAND configuration
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*/
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#ifdef CONFIG_CMD_NAND
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#define CONFIG_NAND_S3C2410
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#define CONFIG_SYS_S3C2410_NAND_HWECC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x4E000000
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#endif
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/*
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* File system
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*/
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_YAFFS2
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#define CONFIG_RBTREE
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
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GENERATED_GBL_DATA_SIZE)
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#define CONFIG_BOARD_EARLY_INIT_F
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#endif /* __CONFIG_H */
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