Nishanth Menon d414aae552 OMAP3: Fix SDRC init ... Defaults are for Infineon DDR timings. Since none of the supported boards currently do XIP boot, these seem to be faulty. fix the values as per the calculations(ACTIMA,B), conf the sdrc power with pwdnen and wakeupproc bits Signed-off-by: Nishanth Menon <nm@ti.com>		2009-11-27 16:26:17 -06:00
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clocks_omap3.h	OMAP3: Add pin mux, clock and cpu headers	2009-01-24 17:51:20 +01:00
clocks.h	OMAP3: Add OMAP3, memory and function prototype headers	2009-01-24 17:51:20 +01:00
cpu.h	OMAP3: Fix SDRC init	2009-11-27 16:26:17 -06:00
gpio.h	OMAP3 Port kernel omap gpio interface.	2009-06-12 20:39:50 +02:00
i2c.h	OMAP2/3: I2C: Add support for second and third bus	2009-11-16 07:25:15 +01:00
mem.h	OMAP3:SDRC: introduce DDR types	2009-11-27 16:26:16 -06:00
mmc_host_def.h	OMAP3: Clean up MMC code	2009-02-22 18:29:10 +01:00
mmc.h	OMAP3 MMC: Fix warning dereferencing type-punned pointer	2009-10-13 06:17:36 -05:00
mux.h	OMAP3: Add pin mux, clock and cpu headers	2009-01-24 17:51:20 +01:00
omap_gpmc.h	Coding style cleanup; update CHANGELOG	2009-02-12 00:08:39 +01:00
omap3.h	OMAP3 Move cache routine to cache.S	2009-10-13 06:17:33 -05:00
sys_proto.h	TI OMAP3: make gpmc_config as const	2009-10-24 09:55:24 -05:00