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https://github.com/brain-hackers/u-boot-brain
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f315828b0d
Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
22 lines
719 B
Makefile
22 lines
719 B
Makefile
#
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# (C) Copyright 2000-2007
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-$(CONFIG_FSL_PCI_INIT) += fsl_pci_init.o
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obj-$(CONFIG_PCI) += pci.o pci_auto.o pci_rom.o
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obj-$(CONFIG_PCI_INDIRECT_BRIDGE) += pci_indirect.o
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obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
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obj-$(CONFIG_PCI_MSC01) += pci_msc01.o
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obj-$(CONFIG_PCIE_IMX) += pcie_imx.o
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obj-$(CONFIG_FTPCI100) += pci_ftpci100.o
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obj-$(CONFIG_SH4_PCI) += pci_sh4.o
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obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
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obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
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obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
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obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o
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obj-$(CONFIG_WINBOND_83C553) += w83c553f.o
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obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o
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