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e6bf0ca0e2
According to the Tegra TRM, GPIOs are aggregated into /ports/ of 8 GPIOs, not into /banks/. Fix <dt-bindings/gpio/tegra-gpio.h> to correctly reflect this naming convention. While this seems like silly churn, it will become slightly more important once we introduce the GPIO binding for upcoming Tegra chips. This mirrors an identical commit in the Linux kernel. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* This header provides constants for binding nvidia,tegra*-gpio.
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*
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* The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
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* provide names for this.
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*
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* The second cell contains standard flag values specified in gpio.h.
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*/
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#ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H
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#define _DT_BINDINGS_GPIO_TEGRA_GPIO_H
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#include <dt-bindings/gpio/gpio.h>
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#define TEGRA_GPIO_PORT_A 0
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#define TEGRA_GPIO_PORT_B 1
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#define TEGRA_GPIO_PORT_C 2
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#define TEGRA_GPIO_PORT_D 3
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#define TEGRA_GPIO_PORT_E 4
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#define TEGRA_GPIO_PORT_F 5
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#define TEGRA_GPIO_PORT_G 6
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#define TEGRA_GPIO_PORT_H 7
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#define TEGRA_GPIO_PORT_I 8
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#define TEGRA_GPIO_PORT_J 9
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#define TEGRA_GPIO_PORT_K 10
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#define TEGRA_GPIO_PORT_L 11
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#define TEGRA_GPIO_PORT_M 12
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#define TEGRA_GPIO_PORT_N 13
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#define TEGRA_GPIO_PORT_O 14
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#define TEGRA_GPIO_PORT_P 15
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#define TEGRA_GPIO_PORT_Q 16
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#define TEGRA_GPIO_PORT_R 17
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#define TEGRA_GPIO_PORT_S 18
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#define TEGRA_GPIO_PORT_T 19
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#define TEGRA_GPIO_PORT_U 20
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#define TEGRA_GPIO_PORT_V 21
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#define TEGRA_GPIO_PORT_W 22
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#define TEGRA_GPIO_PORT_X 23
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#define TEGRA_GPIO_PORT_Y 24
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#define TEGRA_GPIO_PORT_Z 25
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#define TEGRA_GPIO_PORT_AA 26
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#define TEGRA_GPIO_PORT_BB 27
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#define TEGRA_GPIO_PORT_CC 28
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#define TEGRA_GPIO_PORT_DD 29
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#define TEGRA_GPIO_PORT_EE 30
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#define TEGRA_GPIO_PORT_FF 31
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#define TEGRA_GPIO(port, offset) \
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((TEGRA_GPIO_PORT_##port * 8) + offset)
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#endif
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