mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
144 lines
3.6 KiB
C
144 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
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*/
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/*
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* PCI Configuration space access support for MPC83xx PCI Bridge
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*/
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#include <asm/mmu.h>
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#include <asm/io.h>
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#include <common.h>
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#include <mpc83xx.h>
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#include <pci.h>
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#include <i2c.h>
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#include <asm/fsl_i2c.h>
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#include "../common/pq-mds-pib.h"
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static struct pci_region pci1_regions[] = {
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{
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bus_start: CONFIG_SYS_PCI1_MEM_BASE,
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phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
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size: CONFIG_SYS_PCI1_MEM_SIZE,
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flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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},
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{
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bus_start: CONFIG_SYS_PCI1_IO_BASE,
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phys_start: CONFIG_SYS_PCI1_IO_PHYS,
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size: CONFIG_SYS_PCI1_IO_SIZE,
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flags: PCI_REGION_IO
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},
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{
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bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
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phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
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size: CONFIG_SYS_PCI1_MMIO_SIZE,
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flags: PCI_REGION_MEM
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},
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};
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#ifdef CONFIG_MPC83XX_PCI2
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static struct pci_region pci2_regions[] = {
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{
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bus_start: CONFIG_SYS_PCI2_MEM_BASE,
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phys_start: CONFIG_SYS_PCI2_MEM_PHYS,
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size: CONFIG_SYS_PCI2_MEM_SIZE,
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flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
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},
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{
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bus_start: CONFIG_SYS_PCI2_IO_BASE,
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phys_start: CONFIG_SYS_PCI2_IO_PHYS,
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size: CONFIG_SYS_PCI2_IO_SIZE,
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flags: PCI_REGION_IO
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},
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{
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bus_start: CONFIG_SYS_PCI2_MMIO_BASE,
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phys_start: CONFIG_SYS_PCI2_MMIO_PHYS,
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size: CONFIG_SYS_PCI2_MMIO_SIZE,
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flags: PCI_REGION_MEM
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},
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};
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#endif
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void pci_init_board(void)
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#ifdef CONFIG_PCISLAVE
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{
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volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[0];
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struct pci_region *reg[] = { pci1_regions };
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
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pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
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mpc83xx_pci_init(1, reg);
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/*
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* Configure PCI Inbound Translation Windows
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*/
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pci_ctrl[0].pitar0 = 0x0;
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pci_ctrl[0].pibar0 = 0x0;
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pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
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PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
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pci_ctrl[0].pitar1 = 0x0;
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pci_ctrl[0].pibar1 = 0x0;
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pci_ctrl[0].piebar1 = 0x0;
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pci_ctrl[0].piwar1 &= ~PIWAR_EN;
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pci_ctrl[0].pitar2 = 0x0;
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pci_ctrl[0].pibar2 = 0x0;
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pci_ctrl[0].piebar2 = 0x0;
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pci_ctrl[0].piwar2 &= ~PIWAR_EN;
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/* Unlock the configuration bit */
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mpc83xx_pcislave_unlock(0);
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printf("PCI: Agent mode enabled\n");
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}
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#else
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{
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volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
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volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
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volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
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#ifndef CONFIG_MPC83XX_PCI2
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struct pci_region *reg[] = { pci1_regions };
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#else
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struct pci_region *reg[] = { pci1_regions, pci2_regions };
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#endif
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/* initialize the PCA9555PW IO expander on the PIB board */
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pib_init();
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#if defined(CONFIG_PCI_66M)
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
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printf("PCI clock is 66MHz\n");
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#elif defined(CONFIG_PCI_33M)
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
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OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
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printf("PCI clock is 33MHz\n");
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#else
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clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
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printf("PCI clock is 66MHz\n");
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#endif
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udelay(2000);
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/* Configure PCI Local Access Windows */
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pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
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pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
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pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
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pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
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udelay(2000);
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#ifndef CONFIG_MPC83XX_PCI2
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mpc83xx_pci_init(1, reg);
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#else
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mpc83xx_pci_init(2, reg);
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#endif
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}
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#endif /* CONFIG_PCISLAVE */
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