mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-23 03:19:43 +09:00
e6a9ed04e7
Support RAM and MMC boot mode in SPL also with SPL_FIT images. In MMC boot mode two boot options are available: 1) Boot flow with ATF(EL3) and full U-Boot(EL2): aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000 -d bl31.bin atf.ub cp spl/boot.bin <sdcard fat partition> cp atf.ub <sdcard fat partition> cp u-boot.bin <sdcard fat partition> 2) Boot flow with full U-Boot(EL3): cp spl/boot.bin <sdcard> cp u-boot*.img <sdcard> 3) emmc boot mode dd if=/dev/zero of=sd.img bs=1024 count=1024 parted sd.img mktable msdos parted sd.img mkpart p fat32 0% 100% kpartx -a sd.img mkfs.vfat /dev/mapper/loop0p1 mount /dev/mapper/loop0p1 /mnt/ cp spl/boot.bin /mnt cp u-boot.img /mnt cp u-boot.bin /mnt cp atf.ub /mnt umount /dev/mapper/loop0p1 kpartx -d sd.img cp sd.img /tftpboot/ and program it via u-boot tftpb 10000 sd.img mmcinfo mmc write 10000 0 $filesize mmc rescan mmc part ls mmc 0 psu_init() function contains low level SoC setup generated for every HW design by Xilinx design tools. xil_io.h is only supporting file to fix all dependencies from tools. The same solution was used on Xilinx Zynq. The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which stays at the same location all the time. Bootrom expects starting address to be at 0xfffc0000 that's why this address is SPL_TEXT_BASE. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
108 lines
1.8 KiB
C
108 lines
1.8 KiB
C
/*
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* Copyright 2015 - 2016 Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <debug_uart.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/spl.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/sys_proto.h>
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void board_init_f(ulong dummy)
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{
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psu_init();
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board_early_init_r();
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#ifdef CONFIG_DEBUG_UART
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/* Uart debug for sure */
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debug_uart_init();
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puts("Debug uart enabled\n"); /* or printch() */
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#endif
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/* Delay is required for clocks to be propagated */
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udelay(1000000);
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/* Clear the BSS */
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memset(__bss_start, 0, __bss_end - __bss_start);
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/* No need to call timer init - it is empty for ZynqMP */
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board_init_r(NULL, 0);
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}
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#ifdef CONFIG_SPL_BOARD_INIT
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void spl_board_init(void)
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{
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preloader_console_init();
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board_init();
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}
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#endif
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u32 spl_boot_device(void)
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{
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u32 reg = 0;
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u8 bootmode;
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reg = readl(&crlapb_base->boot_mode);
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bootmode = reg & BOOT_MODES_MASK;
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switch (bootmode) {
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case JTAG_MODE:
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return BOOT_DEVICE_RAM;
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#ifdef CONFIG_SPL_MMC_SUPPORT
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case EMMC_MODE:
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case SD_MODE:
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case SD_MODE1:
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return BOOT_DEVICE_MMC1;
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#endif
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default:
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printf("Invalid Boot Mode:0x%x\n", bootmode);
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break;
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}
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return 0;
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}
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u32 spl_boot_mode(void)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_RAM:
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return 0;
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case BOOT_DEVICE_MMC1:
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return MMCSD_MODE_FS;
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default:
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puts("spl: error: unsupported device\n");
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hang();
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}
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}
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__weak void psu_init(void)
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{
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/*
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* This function is overridden by the one in
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* board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
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*/
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}
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#ifdef CONFIG_SPL_OS_BOOT
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int spl_start_uboot(void)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/* Just empty function now - can't decide what to choose */
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debug("%s: %s\n", __func__, name);
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return 0;
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}
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#endif
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