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https://github.com/brain-hackers/u-boot-brain
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![Steve Kipisz](/assets/img/avatar_default.png)
In Errata 1.0.24, if the board is running at OPP50 and has a warm reset, the boot ROM sets the frequencies for OPP100. This patch attempts to drop the frequencies back to OPP50 as soon as possible in the SPL. Then later the voltages and frequencies up set higher. Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> [trini: Adapt to current framework] Signed-off-by: Tom Rini <trini@ti.com>
84 lines
2.0 KiB
C
84 lines
2.0 KiB
C
/*
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* (C) Copyright 2011-2013
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* Texas Instruments, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* For more details, please see the TRM at http://www.ti.com/product/tps65217a
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*/
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#ifndef __POWER_TPS65217_H__
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#define __POWER_TPS65217_H__
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/* I2C chip address */
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#define TPS65217_CHIP_PM 0x24
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/* Registers */
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enum {
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TPS65217_CHIPID = 0x00,
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TPS65217_POWER_PATH,
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TPS65217_INTERRUPT,
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TPS65217_CHGCONFIG0,
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TPS65217_CHGCONFIG1,
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TPS65217_CHGCONFIG2,
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TPS65217_CHGCONFIG3,
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TPS65217_WLEDCTRL1,
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TPS65217_WLEDCTRL2,
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TPS65217_MUXCTRL,
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TPS65217_STATUS,
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TPS65217_PASSWORD,
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TPS65217_PGOOD,
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TPS65217_DEFPG,
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TPS65217_DEFDCDC1,
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TPS65217_DEFDCDC2,
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TPS65217_DEFDCDC3,
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TPS65217_DEFSLEW,
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TPS65217_DEFLDO1,
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TPS65217_DEFLDO2,
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TPS65217_DEFLS1,
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TPS65217_DEFLS2,
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TPS65217_ENABLE,
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TPS65217_DEFUVLO,
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TPS65217_SEQ1,
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TPS65217_SEQ2,
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TPS65217_SEQ3,
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TPS65217_SEQ4,
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TPS65217_SEQ5,
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TPS65217_SEQ6,
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TPS65217_PMIC_NUM_OF_REGS,
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};
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#define TPS65217_PROT_LEVEL_NONE 0x00
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#define TPS65217_PROT_LEVEL_1 0x01
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#define TPS65217_PROT_LEVEL_2 0x02
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#define TPS65217_PASSWORD_LOCK_FOR_WRITE 0x00
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#define TPS65217_PASSWORD_UNLOCK 0x7D
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#define TPS65217_DCDC_GO 0x80
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#define TPS65217_MASK_ALL_BITS 0xFF
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#define TPS65217_USB_INPUT_CUR_LIMIT_MASK 0x03
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#define TPS65217_USB_INPUT_CUR_LIMIT_100MA 0x00
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#define TPS65217_USB_INPUT_CUR_LIMIT_500MA 0x01
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#define TPS65217_USB_INPUT_CUR_LIMIT_1300MA 0x02
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#define TPS65217_USB_INPUT_CUR_LIMIT_1800MA 0x03
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#define TPS65217_DCDC_VOLT_SEL_1125MV 0x09
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#define TPS65217_DCDC_VOLT_SEL_1275MV 0x0F
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#define TPS65217_DCDC_VOLT_SEL_1325MV 0x11
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#define TPS65217_LDO_MASK 0x1F
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#define TPS65217_LDO_VOLTAGE_OUT_1_8 0x06
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#define TPS65217_LDO_VOLTAGE_OUT_3_3 0x1F
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#define TPS65217_PWR_SRC_USB_BITMASK 0x4
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#define TPS65217_PWR_SRC_AC_BITMASK 0x8
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int tps65217_reg_read(uchar src_reg, uchar *src_val);
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int tps65217_reg_write(uchar prot_level, uchar dest_reg, uchar dest_val,
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uchar mask);
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int tps65217_voltage_update(uchar dc_cntrl_reg, uchar volt_sel);
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#endif /* __POWER_TPS65217_H__ */
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