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![Masahiro Yamada](/assets/img/avatar_default.png)
Our recent trend is to collect SoC files into arch/arm/mach-(SOC). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
210 lines
5.9 KiB
C
210 lines
5.9 KiB
C
/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/freeze_controller.h>
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#include <asm/arch/scan_manager.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const struct socfpga_scan_manager *scan_manager_base =
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(void *)(SOCFPGA_SCANMGR_ADDRESS);
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static const struct socfpga_freeze_controller *freeze_controller_base =
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(void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
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/*
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* Function to check IO scan chain engine status and wait if the engine is
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* is active. Poll the IO scan chain engine till maximum iteration reached.
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*/
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static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter)
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{
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uint32_t scanmgr_status;
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scanmgr_status = readl(&scan_manager_base->stat);
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/* Poll the engine until the scan engine is inactive */
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while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) ||
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(SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) > 0)) {
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max_iter--;
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if (max_iter > 0)
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scanmgr_status = readl(&scan_manager_base->stat);
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else
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return 0;
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}
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return 1;
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}
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/* Program HPS IO Scan Chain */
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uint32_t scan_mgr_io_scan_chain_prg(
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uint32_t io_scan_chain_id,
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uint32_t io_scan_chain_len_in_bits,
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const uint32_t *iocsr_scan_chain)
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{
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uint16_t tdi_tdo_header;
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uint32_t io_program_iter;
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uint32_t io_scan_chain_data_residual;
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uint32_t residual;
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uint32_t i;
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uint32_t index = 0;
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/*
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* De-assert reinit if the IO scan chain is intended for HIO. In
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* this, its the chain 3.
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*/
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if (io_scan_chain_id == 3)
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clrbits_le32(&freeze_controller_base->hioctrl,
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SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
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/*
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* Check if the scan chain engine is inactive and the
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* WFIFO is empty before enabling the IO scan chain
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*/
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if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
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return 1;
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/*
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* Enable IO Scan chain based on scan chain id
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* Note: only one chain can be enabled at a time
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*/
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setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
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/*
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* Calculate number of iteration needed for full 128-bit (4 x32-bits)
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* bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
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*/
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io_program_iter = io_scan_chain_len_in_bits >>
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IO_SCAN_CHAIN_128BIT_SHIFT;
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io_scan_chain_data_residual = io_scan_chain_len_in_bits &
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IO_SCAN_CHAIN_128BIT_MASK;
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/* Construct TDI_TDO packet for 128-bit IO scan chain (2 bytes) */
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tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
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(TDI_TDO_MAX_PAYLOAD << TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
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/* Program IO scan chain in 128-bit iteration */
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for (i = 0; i < io_program_iter; i++) {
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/* write TDI_TDO packet header to scan manager */
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writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
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/* calculate array index. Multiply by 4 as write 4 x 32bits */
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index = i * 4;
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/* write 4 successive 32-bit IO scan chain data into WFIFO */
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writel(iocsr_scan_chain[index],
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&scan_manager_base->fifo_quad_byte);
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writel(iocsr_scan_chain[index + 1],
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&scan_manager_base->fifo_quad_byte);
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writel(iocsr_scan_chain[index + 2],
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&scan_manager_base->fifo_quad_byte);
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writel(iocsr_scan_chain[index + 3],
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&scan_manager_base->fifo_quad_byte);
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/*
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* Check if the scan chain engine has completed the
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* IO scan chain data shifting
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*/
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if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
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goto error;
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}
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/* Calculate array index for final TDI_TDO packet */
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index = io_program_iter * 4;
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/* Final TDI_TDO packet if any */
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if (io_scan_chain_data_residual) {
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/*
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* Calculate number of quad bytes FIFO write
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* needed for the final TDI_TDO packet
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*/
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io_program_iter = io_scan_chain_data_residual >>
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IO_SCAN_CHAIN_32BIT_SHIFT;
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/*
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* Construct TDI_TDO packet for remaining IO
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* scan chain (2 bytes)
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*/
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tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
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((io_scan_chain_data_residual - 1) <<
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TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
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/*
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* Program the last part of IO scan chain write TDI_TDO packet
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* header (2 bytes) to scan manager
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*/
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writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
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for (i = 0; i < io_program_iter; i++) {
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/*
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* write remaining scan chain data into scan
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* manager WFIFO with 4 bytes write
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*/
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writel(iocsr_scan_chain[index + i],
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&scan_manager_base->fifo_quad_byte);
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}
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index += io_program_iter;
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residual = io_scan_chain_data_residual &
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IO_SCAN_CHAIN_32BIT_MASK;
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if (IO_SCAN_CHAIN_PAYLOAD_24BIT < residual) {
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/*
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* write the last 4B scan chain data
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* into scan manager WFIFO
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*/
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writel(iocsr_scan_chain[index],
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&scan_manager_base->fifo_quad_byte);
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} else {
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/*
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* write the remaining 1 - 3 bytes scan chain
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* data into scan manager WFIFO byte by byte
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* to prevent JTAG engine shifting unused data
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* from the FIFO and mistaken the data as a
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* valid command (even though unused bits are
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* set to 0, but just to prevent hardware
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* glitch)
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*/
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for (i = 0; i < residual; i += 8) {
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writel(((iocsr_scan_chain[index] >> i)
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& IO_SCAN_CHAIN_BYTE_MASK),
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&scan_manager_base->fifo_single_byte);
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}
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}
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/*
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* Check if the scan chain engine has completed the
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* IO scan chain data shifting
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*/
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if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
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goto error;
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}
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/* Disable IO Scan chain when configuration done*/
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clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
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return 0;
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error:
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/* Disable IO Scan chain when error detected */
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clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
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return 1;
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}
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int scan_mgr_configure_iocsr(void)
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{
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int status = 0;
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/* configure the IOCSR through scan chain */
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status |= scan_mgr_io_scan_chain_prg(0,
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CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH, iocsr_scan_chain0_table);
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status |= scan_mgr_io_scan_chain_prg(1,
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CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH, iocsr_scan_chain1_table);
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status |= scan_mgr_io_scan_chain_prg(2,
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CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH, iocsr_scan_chain2_table);
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status |= scan_mgr_io_scan_chain_prg(3,
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CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH, iocsr_scan_chain3_table);
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return status;
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}
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