Tom Rini 7c352cd38d am33xx: Re-enable SW levelling for DDR2 ... The recent changes for hw leveling on am33xx were not intended for DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config value to check against. This lets us pass in the value we would use to configure, when we have not yet configured the board yet. In other cases update the call to be as functional as before and check an already programmed value in. Tested-by: Yan Liu <yan-liu@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2015-06-15 10:57:26 -04:00
..
board.c	ti: armv7: Move SPL SDRAM init to the right place, drop unused CONFIG_SPL_STACK	2015-03-04 14:55:04 -05:00
clock_am33xx.c
clock_am43xx.c	ARM: AM43xx: Enable clocks for USB OTGSS and USB PHY	2015-04-14 05:48:08 +02:00
clock_ti814x.c
clock_ti816x.c
clock.c
config.mk
ddr.c	am33xx: Re-enable SW levelling for DDR2	2015-06-15 10:57:26 -04:00
emif4.c	am33xx: Re-enable SW levelling for DDR2	2015-06-15 10:57:26 -04:00
Makefile
mux.c
sys_info.c	am335x: make get_board_rev() function weak	2014-11-06 11:04:40 -05:00
u-boot-spl.lds	arm: Add missing .vectors section to linker scripts	2014-08-30 07:46:41 -04:00