mirror of
https://github.com/brain-hackers/u-boot-brain
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499b1a4d33
Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
267 lines
8.1 KiB
C
267 lines
8.1 KiB
C
/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* (C) Copyright 2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2010-2011
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* Heiko Schocher, DENX Software Engineering, hs@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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/*
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* for linking errors see
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* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
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*/
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#ifndef _CONFIG_KM_ARM_H
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#define _CONFIG_KM_ARM_H
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/*
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* High Level Configuration Options (easy to change)
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*/
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#define CONFIG_MARVELL
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#define CONFIG_ARM926EJS /* Basic Architecture */
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#define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */
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#define CONFIG_KIRKWOOD /* SOC Family Name */
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#define CONFIG_KW88F6281 /* SOC Name */
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#define CONFIG_MACH_KM_KIRKWOOD /* Machine type */
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/* include common defines/options for all Keymile boards */
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#include "keymile-common.h"
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#define CONFIG_SYS_TEXT_BASE 0x04000000 /* code address after reloc */
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#define CONFIG_ENV_SIZE (128 << 10) /* NAND chip block size */
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#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
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#define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
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#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
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/* pseudo-non volatile RAM [hex] */
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#define CONFIG_KM_PNVRAM 0x80000
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/* physical RAM MTD size [hex] */
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#define CONFIG_KM_PHRAM 0x17F000
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#define CONFIG_KM_CRAMFS_ADDR 0x2400000
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#define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */
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#define CONFIG_KM_DEF_ENV_CPU \
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"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"boot=bootm ${actual_kernel_addr} - -\0" \
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"cramfsloadfdt=echo \\\\c\0" \
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"tftpfdt=echo \\\\c\0" \
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CONFIG_KM_DEF_ENV_UPDATE \
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""
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#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
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#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
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#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
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#undef CONFIG_KIRKWOOD_PCIE_INIT /* Disable PCIE Port0 for kernel */
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#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
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#define CONFIG_MISC_INIT_R
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/*
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* NS16550 Configuration
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
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/*
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* Serial Port configuration
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* The following definitions let you select what serial you want to use
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* for your console driver.
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*/
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#define CONFIG_CONS_INDEX 1 /* Console on UART0 */
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/*
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* For booting Linux, the board info and command line data
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* have to be in the first 8 MB of memory, since this is
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* the maximum mapped by the Linux kernel during initialization.
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*/
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#define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */
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#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
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#define CONFIG_INITRD_TAG /* enable INITRD tag */
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#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
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/*
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* Commands configuration
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*/
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#define CONFIG_CMD_ELF
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NFS
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/*
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* Without NOR FLASH we need this
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*/
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#define CONFIG_SYS_NO_FLASH
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_IMLS
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/*
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* NAND Flash configuration
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*/
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS 1
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#define CONFIG_NAND_KIRKWOOD
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#define CONFIG_SYS_NAND_BASE 0xd8000000
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#define BOOTFLASH_START 0x0
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#define CONFIG_KM_CONSOLE_TTY "ttyS0"
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/* size in bytes reserved for initial data */
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/*
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* Other required minimal configurations
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*/
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#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
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#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
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#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
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#define CONFIG_NR_DRAM_BANKS 4
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#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
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#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
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/*
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* Ethernet Driver configuration
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*/
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#define CONFIG_NETCONSOLE /* include NetConsole support */
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#define CONFIG_NET_MULTI /* specify more that one ports available */
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#define CONFIG_MII /* expose smi ove miiphy interface */
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#define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */
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#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
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#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
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#define CONFIG_PHY_BASE_ADR 0
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#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
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#define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */
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/*
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* UBI related stuff
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*/
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#define CONFIG_SYS_USE_UBI
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/*
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* I2C related stuff
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*/
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#define CONFIG_SOFT_I2C /* I2C bit-banged */
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#define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */
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#if defined(CONFIG_SOFT_I2C)
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#ifndef __ASSEMBLY__
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#include <asm/arch-kirkwood/gpio.h>
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extern void __set_direction(unsigned pin, int high);
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void set_sda(int state);
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void set_scl(int state);
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int get_sda(void);
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int get_scl(void);
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#define KM_KIRKWOOD_SDA_PIN 8
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#define KM_KIRKWOOD_SCL_PIN 9
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#define KM_KIRKWOOD_ENV_WP 38
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#define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0)
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#define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1)
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#define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
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#define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
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#define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
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#endif
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#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
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#define I2C_SOFT_DECLARATIONS
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#define CONFIG_SYS_I2C_SLAVE 0x0
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#define CONFIG_SYS_I2C_SPEED 100000
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#endif
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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/*
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* Environment variables configurations
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*/
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#define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */
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#define CONFIG_SYS_DEF_EEPROM_ADDR 0x50
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#define CONFIG_ENV_EEPROM_IS_ON_I2C
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#define CONFIG_SYS_EEPROM_WREN
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#define CONFIG_ENV_OFFSET 0x0 /* no bracets! */
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#undef CONFIG_ENV_SIZE
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#define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET)
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#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
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/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
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#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
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#define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */
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#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH
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#define CONFIG_HARD_SPI
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#define CONFIG_KIRKWOOD_SPI
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#define CONFIG_SPI_FLASH_STMICRO
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#define CONFIG_ENV_SPI_BUS 0
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#define CONFIG_ENV_SPI_CS 0
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#define CONFIG_ENV_SPI_MAX_HZ 50000000 /* 50Mhz */
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#define FLASH_GPIO_PIN 0x00010000
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#define MTDIDS_DEFAULT "nand0=orion_nand"
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/* test-only: partitioning needs some tuning, this is just for tests */
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#define MTDPARTS_DEFAULT "mtdparts=" \
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"orion_nand:" \
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"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
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#define CONFIG_KM_DEF_ENV_UPDATE \
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"update=" \
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"spi on;sf probe 0;sf erase 0 50000;" \
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"sf write ${u-boot_addr_r} 0 ${filesize};" \
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"spi off\0"
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#if defined(CONFIG_SYS_NO_FLASH)
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#define CONFIG_KM_UBI_PARTITION_NAME "ubi0"
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#undef CONFIG_FLASH_CFI_MTD
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#undef CONFIG_JFFS2_CMDLINE
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#endif
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE 0x00000000
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/* Kirkwood has 2k of Security SRAM, use it for SP */
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#define CONFIG_SYS_INIT_SP_ADDR 0xC8012000
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/* Do early setups now in board_init_f() */
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#define CONFIG_BOARD_EARLY_INIT_F
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/*
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* resereved pram area at the end of memroy [hex]
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* 8Mbytes for switch + 4Kbytes for bootcount
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*/
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#define CONFIG_KM_RESERVED_PRAM 0x801000
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/* address for the bootcount (taken from end of RAM) */
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#define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM)
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#endif /* _CONFIG_KM_ARM_H */
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