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https://github.com/brain-hackers/u-boot-brain
synced 2024-07-25 20:39:43 +09:00
2b4ffbf6b4
This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. The upstream code is incorporated omitting the ddr4 and apn806 and folding the nested a38x directory up one level. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE. Some now empty files are removed and the ternary license is replaced with a SPDX GPL-2.0+ identifier. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
20 lines
814 B
Makefile
20 lines
814 B
Makefile
# SPDX-License-Identifier: GPL-2.0+
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_plat.o
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_sys_env_lib.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_debug.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_init.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_bist.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_centralization.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_db.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_hw_algo.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_ip_engine.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_leveling.o
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obj-$(CONFIG_SPL_BUILD) += ddr3_training_pbs.o
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_build_message.o
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_common.o
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_spd.o
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obj-$(CONFIG_SPL_BUILD) += mv_ddr_topology.o
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obj-$(CONFIG_SPL_BUILD) += xor.o
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