mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-10-05 11:00:43 +09:00
d873133f2b
This patch adds another build target for the AMCC Sequoia PPC440EPx eval board. This RAM-booting version is targeted for boards without NOR FLASH (NAND booting) which need a possibility to initially program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000) configured to setup the SDRAM, this debugger can load this RAM- booting image to the target address in SDRAM (in this case 0x1000000) and start it there. Then U-Boot's standard NAND commands can be used to program the NAND FLASH (e.g. "nand write ..."). Here the commands to load and start this image from the BDI2000: 440EPX>reset halt 440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin 440EPX>go 0x1000000 Please note that this image automatically scans for an already initialized SDRAM TLB (detected by EPN=0). This TLB will not be cleared. This TLB doesn't need to be TLB #0, this RAM-booting version will detect it and preserve it. So booting via BDI2000 will work and booting with a complete different TLB init via U-Boot works as well. Signed-off-by: Stefan Roese <sr@denx.de> |
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.. | ||
4xx_ibm_ddr2_autocalib.c | ||
4xx_pci.c | ||
4xx_pcie.c | ||
4xx_uart.c | ||
40x_spd_sdram.c | ||
44x_spd_ddr2.c | ||
44x_spd_ddr.c | ||
bedbug_405.c | ||
cache.S | ||
commproc.c | ||
config.mk | ||
cpu_init.c | ||
cpu.c | ||
dcr.S | ||
denali_data_eye.c | ||
denali_spd_ddr2.c | ||
ecc.c | ||
ecc.h | ||
fdt.c | ||
gpio.c | ||
i2c.c | ||
interrupts.c | ||
iop480_uart.c | ||
kgdb.S | ||
Makefile | ||
miiphy.c | ||
ndfc.c | ||
resetvec.S | ||
sdram.c | ||
sdram.h | ||
speed.c | ||
start.S | ||
tlb.c | ||
traps.c | ||
uic.c | ||
usb_ohci.c | ||
usb_ohci.h | ||
usb.c | ||
usbdev.c | ||
usbdev.h | ||
xilinx_irq.c |