mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-06 03:06:16 +09:00
2110eeaf0f
The timer reload value is a property of the timer hardware and there is no reason for this to be configurable. Place this into the timer driver just like on the other hardware. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
25 lines
514 B
C
25 lines
514 B
C
/*
|
|
* Copyright (C) 2012 Altera Corporation <www.altera.com>
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <asm/io.h>
|
|
#include <asm/arch/timer.h>
|
|
|
|
#define TIMER_LOAD_VAL 0xFFFFFFFF
|
|
|
|
static const struct socfpga_timer *timer_base = (void *)CONFIG_SYS_TIMERBASE;
|
|
|
|
/*
|
|
* Timer initialization
|
|
*/
|
|
int timer_init(void)
|
|
{
|
|
writel(TIMER_LOAD_VAL, &timer_base->load_val);
|
|
writel(TIMER_LOAD_VAL, &timer_base->curr_val);
|
|
writel(readl(&timer_base->ctrl) | 0x3, &timer_base->ctrl);
|
|
return 0;
|
|
}
|